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Manufacturing method of thin film transistor array substrate

A technology of thin film transistors and manufacturing methods, which is applied in the field of liquid crystal display manufacturing, can solve the problems of lowering manufacturing costs and high cost of large-size photomasks, and achieve the effect of saving photomask costs

Inactive Publication Date: 2011-12-21
CPT TECH GRP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

In addition, with the demand for large-size flat-panel display panels, the size of the photomask used to make large-size panels will also increase, and each photomask process needs to use different masks, and the cost of large-size photomasks will increase. Therefore, large-size flat panel display panels will be limited by the number and cost of photomasks, and cannot effectively reduce their production costs

Method used

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  • Manufacturing method of thin film transistor array substrate
  • Manufacturing method of thin film transistor array substrate
  • Manufacturing method of thin film transistor array substrate

Examples

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Embodiment Construction

[0009] Please refer to Figure 1 to Figure 9 , which is a schematic diagram of the product structure corresponding to each step of the manufacturing method of the thin film transistor array substrate according to a preferred embodiment of the present invention. First please refer to figure 1 , provide a substrate 10, the upper surface of the substrate 10 is sequentially provided with a semiconductor layer 12, an ohmic contact layer 14 and a first metal layer 16, wherein the substrate 10 can be a glass substrate, a plastic substrate or a flexible substrate, semiconductor The layer 12 and the ohmic contact layer 14 comprise amorphous silicon or other semiconductor materials, and the ohmic contact layer 14 is an optional layer, which can be a heavily doped amorphous silicon layer; the first metal layer 16 can be made of metal, such as: Aluminum, molybdenum, titanium, chromium, copper or the metal oxide, such as titanium oxide, or the alloy of the metal or other conductive materi...

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PUM

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Abstract

The invention specifically discloses a manufacturing method for a plurality of groups of substrates of a thin-film transistor, belonging to the manufacturing field of liquid crystal display and comprising the steps: defining a source electrode, a drain electrode and a passage on a substrate by a first light mask process, then forming a dielectric layer to cover the substrate and defining a patterned photoresistor on the dielectric layer by a second light mask process, afterwards, forming a transparent conductive layer to cover the patterned photoresistor and the substrate and removing the patterned photoresistor and partial transparent conductive layer covering the patterned photoresistor by an uncovering process, and in the end, forming a gate electrode on the dielectric layer by a third light mask process. The invention has the advantages of effectively and greatly lowering the cost of light mask only by making use of three light mask processes and adapting to the manufacture of panels with various sizes.

Description

technical field [0001] The invention relates to a method for manufacturing a thin film transistor array substrate, in particular to a method for manufacturing a thin film transistor array substrate that can be manufactured with only three photomask processes, and belongs to the field of liquid crystal display manufacturing. Background technique [0002] With the improvement of flat-panel display manufacturing technology, it is not difficult to provide large-size, high-definition, high-brightness flat-panel displays. In the manufacturing process, in addition to improving product quality and better specifications, good quality control also It is an important link to improve the pass rate of the overall process. Taking the common thin-film transistor liquid crystal display (TFT-LCD) as an example, the main manufacturing process includes three parts: TFT array engineering (TFT array engineering), panel engineering (cell engineering), and module engineering (module engineering). ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/82H01L21/336G03F1/00G03F7/00
Inventor 廖展章邱羡坤言维邦徐朝焕黄坤源
Owner CPT TECH GRP
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