Design method of virtual testing system of network device

A technology of virtual testing and network equipment, applied in the field of testing, can solve the problems of large testing workload, large demand for testing instruments, troublesome diagnosis, etc., to achieve the effect of convenient diagnosis and saving testing cost.

Active Publication Date: 2010-07-14
丁贤根
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] 1) A large number of test instruments are required, and the test cost is very high
[0007] Test instruments, hardware simulation boards and development boards are very expensive. Due to the heavy workload of testing, many testers are generally required to test at the same time, so there is a great demand for test instruments
At the same time, if complex topological structures are to be tes...

Method used

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  • Design method of virtual testing system of network device
  • Design method of virtual testing system of network device
  • Design method of virtual testing system of network device

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Embodiment Construction

[0051] figure 1 One embodiment of the present invention is shown. In this embodiment, the virtual test system is the virtual test system provided by the present invention, and runs on the test server. The virtual test system consists of one or more virtual machines, and each virtual machine has a specified number of network ports. If a virtual machine is used as a test instrument, a simulated test instrument must be run on this virtual machine. If a virtual machine is used as the device under test, the simulated network chip needs to be run on the virtual machine. If the system software is to be tested, the system software needs to be run on the virtual machine. The connection between the network ports of the virtual machine is a virtual network connection.

[0052] The network port of the simulated network chip or the simulated test instrument is mapped one-to-one with the network port of the virtual machine, and the mapping information is stored in a port mapping table. A...

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Abstract

The invention relates to a design method of a virtual testing system of a network device. The method is realized by using the network chip and testing instrument in a software simulation network device, wherein the analog network chip and analog testing instrument both run on virtual machine, the network ports of the analog network chip and the analog testing instrument are mapped to the network ports of the virtual machine, and the network ports of the virtual machine adopt virtual connection. From the user's perspective, the processing to messages by the analog network chip is the same as the processing to messages by the real network chip except for the parts which are not considered in virtual test such as the processing speed which may be different from that of the real network chip; the analog network chip can be used to provide API for system software to interact; and the analog testing instrument can be used to transmit messages, receive messages and analyze message results according to the configuration of the user. The method of the invention can largely save the testing cost of the network device and find problems in diagnostic test easily and conveniently.

Description

(1) Technical field [0001] The invention relates to the field of testing, in particular to a virtual testing system, in particular to a virtual testing system for network equipment. (2) Background technology [0002] The network equipment generally includes two parts: network chip and system software. In order to improve the speed of network equipment processing packets and reduce the load on the CPU, the logic that needs high-speed processing is generally placed in the network chip to achieve high-speed processing in hardware, while other parts are processed by system software. [0003] The test work of the network equipment mainly includes two parts: the test of the network chip and the test of the system software. At present, the test of the network chip generally adopts hardware emulation. The RTL code of the network chip is compiled and synthesized into an object file, and then loaded into the FPGA of the emulation board, and finally tested on the emulation board. The...

Claims

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Application Information

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IPC IPC(8): H04L12/26H04L12/56
Inventor 颜小波何慈康郑有为丁贤根
Owner 丁贤根
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