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Control method of chamber environment

A control method and chamber technology, which are applied in semiconductor/solid-state device manufacturing, gaseous chemical plating, coating, etc., can solve problems affecting production efficiency, increase production cost, increase warm-up wafers, etc., to improve production efficiency, Guaranteed stability and economical use

Active Publication Date: 2011-12-21
BEIJING NAURA MICROELECTRONICS EQUIP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Although this method will not cause damage to the protective coating of the mechanical parts in the chamber, it cannot be carried out in the same process as the normal product wafer processing because the warm-up wafer needs to be etched separately before each product wafer is processed. Thus affecting the production efficiency, and increasing the warm-up chip also increases the production cost

Method used

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  • Control method of chamber environment
  • Control method of chamber environment
  • Control method of chamber environment

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0045] figure 1 It is a schematic diagram of the plasma etching machine used in this embodiment, such as figure 1As shown, when a semiconductor wafer (such as a silicon wafer 102) is subjected to a plasma etching process, the silicon wafer 102 is introduced into the process chamber 101 and placed on the electrostatic chuck 103. After the wafer 102 is adsorbed and fixed, the process gas is introduced into the process chamber 101 through the nozzle 104 , and RF power is applied to the process gas to generate plasma 105 , so as to realize the etching of the silicon wafer 102 .

[0046] In this embodiment, the above-mentioned plasma etching machine is used to process multiple wafers, and the process stability between each wafer is guaranteed through the control method of the chamber environment, so as to prevent process drift, resulting in etched morphology, Etching selectivity, etch or deposition rate and uniformity deviate. figure 2 It is a flow chart of the method for contro...

Embodiment 2

[0061] The plasma processing machine in this embodiment is the same as that in Embodiment 1, and will not be repeated here. image 3 It is a flow chart of the method for controlling the chamber environment described in this embodiment. As shown in the figure, the control method includes the following steps:

[0062] Step S21: Before performing the plasma processing process on the wafer, the chamber 101 (see figure 1 ) to carry out plasma cleaning to remove the attachments in the chamber (for the wafers after the first wafer, the attachments also include the passivation layer of the previous deposition);

[0063] Step S22: Next, deposit a passivation layer in-situ in the cleaned chamber 101 .

[0064] The wafer is then subjected to a plasma processing process. The plasma processing process can be etching or deposition.

[0065] Wherein the passivation layer is an anti-fluorine plasma material. The passivation layer includes one or a combination of at least two of silicon o...

Embodiment 3

[0071] Figure 5 It is a flow chart of the method for controlling the chamber environment described in this embodiment. As shown in the figure, the control method includes the following steps:

[0072] Step S31: performing plasma process machine maintenance (process maintenance, PM);

[0073] Step S32: Perform plasma cleaning on the chamber to remove impurities during machine maintenance;

[0074] Step S33: In-situ depositing a passivation layer in the cleaned chamber.

[0075] The passivation layer is an anti-fluorine plasma material. The passivation layer includes one or a combination of at least two of silicon oxide, aluminum oxide, yttrium oxide, silicon nitride, titanium nitride and silicon oxynitride. The passivation layer described in this embodiment is, for example, a silicon oxide layer (SiO2), and the deposition method is, for example, prepared by decomposing TEOS in a plasma state or by reacting SiH4 with O2 or O3. The thickness of the silicon oxide layer is Ca...

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Abstract

The invention provides a method for controlling the environment of a chamber, which includes: before performing a plasma processing process on the wafer, depositing a passivation layer in situ in the chamber so that the environment inside the chamber is covered by the passivation layer, and then performing the wafer processing. The plasma processing technology, so each wafer is in the environment covered by the passivation layer in the processing process. During subsequent plasma processing of other wafers, the passivation layer can be deposited repeatedly every few wafers. Optionally, after a certain number of wafers are processed continuously, the passivation layer is deposited again before the next wafer processing. Preferably, after the in-situ deposition of the passivation layer in the chamber, the method further includes: performing plasma cleaning on the passivation layer to remove attachments on the surface of the passivation layer. Using the control method provided by the invention to control the environment in the chamber during the plasma processing of batch wafers is beneficial to improving the production efficiency of plasma processing and reducing costs.

Description

technical field [0001] The invention relates to the technical field of plasma processing, in particular to a method for controlling the environment of a plasma processing chamber. Background technique [0002] In industries such as integrated circuits or solar cells, plasma processing techniques such as plasma etching and plasma-assisted chemical vapor deposition are usually used to form planar circuit structures in or on wafers of semiconductor materials. In the batch production process, the process stability of plasma processing between wafers becomes a major consideration. [0003] Generally speaking, the compound attached in the plasma processing chamber will be one of the important factors causing process (etching morphology, etching selectivity, etching or deposition rate and uniformity, etc.) drift. For example, as the wafer is etched, some by-products will be deposited on the inner wall of the plasma-etched chamber to form attached compounds. These by-products may a...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/00C23C16/30H01L21/20H01L21/3065H01L21/311C23F4/00
Inventor 吴桂龙
Owner BEIJING NAURA MICROELECTRONICS EQUIP CO LTD