Bootstrap switch circuit

Abstract

The invention discloses a bootstrap switch circuit, which comprises a bootstrap switch coupled between an input node and an output node, a first transistor coupled to the control node of the bootstrap switch, a first capacitor coupled to the first transistor, a second transistor coupled between the control node of the first transistor and a power supply node and provided with a control node coupled to a first clock signal node, a third transistor coupled between the control node of the first transistor and the power supply node, a starting circuit provided with a second end coupled to the control node of the first transistor, a charge pump and a level shifter provided with a second output coupled with the control node of the starting circuit. The bootstrap switch circuit generates double power supply voltage by using the charge pump to switch on the starting circuit so as to feasibly fulfill the purpose of supporting a larger input signal range with small chip area and keep higher response speed.

Description

technical field [0001] The invention relates to integrated electronic circuit design, in particular to a bootstrap switch circuit design with low power consumption and large signal input range. Background technique [0002] Highly integrated power management applications often require the ability to have a large signal input range of voltage quantities, which is fundamentally due to the ability to operate at the lowest possible supply voltage while still maintaining sampling and data measurement of the environment exceeding the supply voltage. An essential requirement for operating power management ICs to maximize efficiency. [0003] In today's highly integrated power management applications, low power successive approximation register (SAR) analog-to-digital converters (ADCs) are often used to monitor on-chip and off-chip voltage quantities. This requirement often extends the range of the upper ADC to sample inputs greater than the supply voltage. The ADC must run at the...

AI Technical Summary

Problems solved by technology

But the transistor MSH in its start-up circuit is a PMOS transistor. When the signal level exceeds the power supply level, the Vstart level will be close to twice the power supply voltage VDD, which will turn on the parasitic diode from the drain of the transistor MSH to the N well, so that The gate voltage of the main switching transistor MSW is limited, increasing power consumption and affecting the reliability of the circuit

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