Unlock instant, AI-driven research and patent intelligence for your innovation.

Packaging method of directly placing firstly-plated and later-etched module by double-sided graphic chip

A graphics chip and packaging method technology, applied in the manufacture of electrical components, electric solid state devices, semiconductor/solid state devices, etc., can solve the problems of large volume and area, high cost of metal wires, slow signal output speed of chips, etc. The effect of area reduction, cost reduction, and distance reduction

Active Publication Date: 2012-07-04
JCET GROUP CO LTD
View PDF0 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] In addition, due to the long distance between the chip and the pin, the length of the metal wire is long, such as Figure 6~7 As shown, the cost of metal wires is high (especially expensive pure gold metal wires); also due to the long length of metal wires, the signal output speed of the chip is slow (especially for storage products and those that require a large amount of data) calculation, more prominent); also because the length of the metal wire is longer, the interference of the parasitic resistance / capacitance and the parasitic pole existing in the metal wire to the signal is also higher; and because the chip and the pin between The longer the distance, the larger the volume and area of ​​the package, the higher the material cost, and the more waste

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Packaging method of directly placing firstly-plated and later-etched module by double-sided graphic chip
  • Packaging method of directly placing firstly-plated and later-etched module by double-sided graphic chip
  • Packaging method of directly placing firstly-plated and later-etched module by double-sided graphic chip

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0064] The double-sided graphics chip of the present invention is directly placed, first plated and then engraved, and the packaging method of the module is as follows:

[0065] see figure 2 and image 3 , figure 2 It is a schematic diagram of the packaging structure of the double-sided graphic chip direct placement module of the present invention. image 3 for figure 2 top view. Depend on figure 2 and image 3 It can be seen that the double-sided graphics chip of the present invention is directly placed in the module package structure, including pins 2, plastic sealing compound (epoxy resin) 3 without filler, non-conductive adhesive material 6, chip 7, metal wire 8 and organic Filling molding compound (epoxy resin) 9, the front of the pin 2 extends as far as possible below the area where the subsequent chip is mounted, and the front of the pin 2 is provided with a first metal layer 4, and the front of the pin 2 is provided with a first metal layer 4. 2 is provided ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to a packaging method of directly placing a firstly-plated and later-etched module by a double-sided graphic chip. The method comprises the following steps: taking a metal substrate; a front surface of the metal substrate being executed with a metal layer electroplating coated; performing etching operation of each graphic on a rear surface of the metal substrate to etch the rear surface of a pin, simultaneously, extending the front surface of the pin as long as possible to be under a region of a consequent bonding chip; packing the rear surface of the metal substrate with stuffing-free plastic package material; etching the front surface of the metal substrate; etching out the front surface of the pin so that the rear surface of the pin is smaller than the front surface thereof in dimension, thereby forming a pin structure with big upper part and small lower part; loading; binding a metal wire; covering the front surface of an intermediate product with the stuffing-containing plastic packaging material (epoxy resin); the rear surface of the metal substrate being executed with the metal layer electroplating coated; and cutting off the finished products. The method solves the problem of dropping the pin and can shorten the length of the metal wire.

Description

(1) Technical field [0001] The invention relates to a method for directly placing a double-sided graphics chip, first plating, and engraving a module package. It belongs to the technical field of semiconductor packaging. (2) Background technology [0002] The traditional manufacturing method of the chip packaging structure is: after chemical etching and surface electroplating are carried out on the front side of the metal substrate, the production of the lead frame is completed (such as Figure 4 shown). The backside of the leadframe is etched during the packaging process. This law has the following shortcomings: [0003] Because only half-etching work is done on the front of the metal substrate before plastic sealing, and the plastic sealing material is only half a foot high to cover the pins during the plastic sealing process, so the binding ability between the plastic package and the pins becomes smaller. If the plastic package is considerate When the chip is not very ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/50H01L21/48
CPCH01L2224/92247H01L24/97H01L2224/97H01L2224/73265H01L2224/32245H01L2224/48247H01L24/73
Inventor 王新潮梁志忠
Owner JCET GROUP CO LTD