Grid structure forming method

Abstract

The invention discloses a grid structure forming method, which comprises: providing a substrate; forming a grid medium layer, a polycrystalline silicon layer, a metallic silicide layer and a hard mask layer on the surface of the substrate in turn; forming a photoresist pattern, which corresponds to a grid, on the surface of the hard mask layer; etching the hard mask layer, the metallic silicide layer and the polycrystalline silicon layer in turn by using the photoresist pattern as a mask and by a plasma etching process so as to form the grid; the metallic silicide layer is narrower than the polycrystalline silicon layer; and annealing the metallic silicide layer, the polycrystalline silicon layer, the grid medium layer and the substrate. In the invention, a plasma process adopted for removing part of metallic silicide layer can be combined with processes for etching the hard mask layer and the polycrystalline silicon layer and integrated in the same etching process by the same etchingequipment, so a semiconductor process step is saved and the production efficiency is improved.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a gate structure forming method. Background technique [0002] At present, VLSI has developed to an integration level of more than 100,000 components per single chip. In addition to requiring new circuit design, new device structure and technology, etc., this circuit must further reduce the number of devices. geometric dimensions. [0003] Therefore, Au, Ag, Al, and polysilicon, which are usually used as low-resistance gates, are no longer suitable for the above-mentioned requirements. Al has the advantages of high electrical conductivity, etc., but due to the penetration and electromigration of Al in silicon, it is prone to short circuit phenomenon caused by Al penetration; polysilicon is often used as the gate in MOS circuit, but its resistivity is high (about 10- 3Ωcm), when the line width is reduced to 1um, the large time constant RC will affect the speed of the c...

AI Technical Summary

Problems solved by technology

[0009] The above-mentioned etching process usually uses plasma etching, because the plasma will cause damage to the metal silicide layer, polysilicon layer and gate dielectric layer, and the damage to the polysilicon layer will lead to a decrease in the reliability of the transistor, making the transistor that has been working for a certain period of time Key electrical characteristics such as threshold voltage, saturation current, and transconductance shift; damage to the gate dielectric layer will cause the transistor to lose electrons from the gate dielectric layer during operation, eventually leading to transistor failure

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