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Double diffusion drain metal oxide semiconductor field effect transistor (DDDMOS) and manufacturing method thereof

A technology of lightly doped area and heavily doped area, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as parasitic triode damage, achieve small trigger voltage, not easy to early damage, shock The effect of small breakdown voltage

Active Publication Date: 2012-06-20
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] Second, when the parasitic triode is turned on, the figure 2 In the position B shown, that is, the contact between the lightly doped region 12 of the drain and the side wall 15, there is a relatively large electric field and current, and the early damage of the parasitic triode is easy to occur at this position when it is turned on.

Method used

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  • Double diffusion drain metal oxide semiconductor field effect transistor (DDDMOS) and manufacturing method thereof
  • Double diffusion drain metal oxide semiconductor field effect transistor (DDDMOS) and manufacturing method thereof
  • Double diffusion drain metal oxide semiconductor field effect transistor (DDDMOS) and manufacturing method thereof

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Embodiment Construction

[0043] see image 3 , the DDDMOS of the present invention includes the following parts: (Illustrate with n-type DDDMOS as an example)

[0044] - a p-type substrate 10;

[0045] - a p-well 11, on a p-type substrate 10;

[0046] The wells with the same doping type on the substrate can also be replaced with wells with the same doping on the epitaxial layer, or replaced by the substrate, the epitaxial layer of the opposite doping type, or the well of the opposite doping type. The three-layer structure has no influence on the present invention.

[0047] - an n-type annular lightly doped region 20 in the p-well 11;

[0048] see Figure 4 , the horizontal cross-sectional view of the n-type ring-shaped lightly doped region 20 is ring-shaped, that is, the middle part thereof is still the p-well 11 . Figure 4 The ring-shaped lightly doped region 20 shown is only for illustration, and the shape and size of the outer edge and inner edge may have other changes.

[0049] a first isol...

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Abstract

The invention discloses a double diffusion drain metal oxide semiconductor field effect transistor (DDDMOS). In the DDDMOS, a lightly doped region of the drain of the traditional DDDMOS is changed into an annular lightly doped region, so that a heavily doped region of the drain directly contacts with a trap. When the DDDMOS serves as an electrostatic protection structure of a high-voltage circuit, voltage breakdown occurs between the heavily doped region of the drain and the trap. The invention also discloses a manufacturing method of the DDDMOS. In the manufacturing method, a mask or a barrier layer of an annular ion implantation window is exposed in the process of ion implantation of the lightly doped region of the drain. The DDDMOS has the advantages that: the breakdown voltage and thetrigger conduction voltage are small; and early failure is avoided.

Description

technical field [0001] The invention relates to a semiconductor integrated circuit device and a manufacturing method thereof, in particular to a DDDMOS and a manufacturing method thereof. Background technique [0002] DDDMOS (Double Diffusion Drain MOSFET, double diffused drain MOS transistor) is usually used as a working structure and / or electrostatic protection (ESD) structure of a high voltage circuit. [0003] see figure 1 , which is a schematic diagram of an existing DDDMOS, using n-type DDDMOS as an example. On the p-type substrate 10 is a p-well 11 . There are n-type lightly doped regions 12 and field oxygen isolation structures 131 , 132 and 133 in the p-well 11 . Above the p-well 11 is a gate 14 . Two sides of the gate 14 are sidewalls 15 . In the p-well 11 and between the field oxygen isolation structures 131 and 132 is a p-type heavily doped region 161 . In the p-well 11 and between one side of the side wall 15 and the field oxygen isolation structure 132 is...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/78H01L29/06H01L29/36H01L21/336H01L21/266
Inventor 高翔
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP