Interconnect with flexible dielectric layer

Abstract

An integrated circuit device has a dual damascene structure including a lower via portion and an upper line portion. The lower via portion is formed in a polyimide layer, and the upper line portion is formed in an inter-metal dielectric (IMD) layer formed of USG or polyimide. A passivation layer is formed on the IMD layer, and a bond pad is formed overlying the passivation layer to electrically connect the upper line portion. A flexible film provided in the Top Via level VT and / or Top-1Via level VT-1 provides stress release to reduce or avoid cracking of the IMD layer with low dielectric constants.

Description

technical field [0001] The present invention relates to semiconductor integrated circuits (ICs), and more particularly to an interconnection structure or a method of forming an interconnection structure. Background technique [0002] A semiconductor integrated circuit includes an active device formed on a semiconductor substrate, and has an interconnection structure formed on the active device. Interconnect structures typically contain 3 to 15 printed circuit layers. Each printed circuit layer is formed of intermetal dielectric (IMD) material with one or more trenches filled with conductive material, such as copper or aluminum, to form conductive lines. Each IMD layer also includes a plurality of conductive vias, which are wires connecting adjacent layers. [0003] The material and layout of the IMD layers are chosen to minimize size, reduce propagation delay, and reduce adjacent layer interference. One technique to achieve these goals is to use intermetallic dielectric m...

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Problems solved by technology

For example, although the modulus of elasticity of silica is 78Gpa, but for "SiLK TM "For example, its modulus of elasticity is only 2.7Gpa

Also, while silicon dioxide has a coefficient of thermal expansion (CTE) that matches that of the IC substrate and the packaging substrate to which the IC is attached, many low-k and ELK materials have CTEs that do not match those of the packaging substrate. There is a substantial difference in the coefficient of thermal expansion

As a result, during testing, peeling and chipping on top of the IMD layer was seen

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