Multiple source MOS transistor with impurity segregation and production method thereof

Abstract

The invention provides a multiple source MOS (metal oxide semiconductor) transistor with impurity segregation and a production method thereof. The multiple source MOS transistor comprises a control gate electrode layer, a gate dielectric layer, a semiconductor substrate, a highly-doped source region and a highly-doped drain region; one end of a control gate extends towards the highly-doped sourceregion to form a T shape; the extended gate region is used as an extension gate; an original control gate region is a main gate; the highly-doped source region is formed by highly doping a semiconductor and is positioned on two sides of the extension gate along the width direction of the source region; and one side of the highly-doped region, which is away from the channel direction, is connectedwith a Schottky source region with impurity segregation. Compared with the present MOSFET (metal-oxide-semiconductor field-effect transistor), under the same process condition and the same size of the active region, higher conducting current, lower leakage current and steeper sub-threshold slope can be obtained.

Description

technical field [0001] The invention belongs to the field of field effect transistor logic devices and circuits in CMOS ultra large integrated circuits (ULSI), and in particular relates to a combination of impurity segregated Schottky (Dopant-Segregated Schottky) and band-to-band tunneling (Band-to-Band Tunneling) A composite source MOS transistor and a method for making the same. Background technique [0002] As the feature size of metal-oxide-silicon field-effect transistors (MOSFETs) enters the nanometer scale, negative effects such as short-channel effects of devices become more and more serious. Drain-induced barrier lowering (DIBL) and other effects make the off-state leakage current of the device continuously increase, and with the decrease of the threshold voltage of the device, the static power consumption of the integrated circuit is increased. Not only that, the subthreshold slope of traditional MOSFET devices cannot be reduced synchronously with the reduction of...

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Problems solved by technology

TFET has many excellent characteristics such as low leakage current, low subthreshold slope, low operating voltage and low power consumption, but due to the limitation of source junction tunneling probability and tunneling area, TFET faces the problem of low on-state current

The patent (CN 101719517A) proposes a Schottky tunneling transistor, which solves the source-drain self-alignment problem of TFET devices by using the Schottky junction in the source-drain, but it still faces the problem of small on-state current

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