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Solid-state imaging device and method of manufacturing the same

A technology of a solid-state imaging device and a manufacturing method, which is applied in the direction of electric solid-state devices, radiation control devices, image communication, etc., can solve the problems of reduced sensitivity, unfavorable carrier color mixing, etc., and achieve the effects of preventing exhaustion and reducing dark current

Inactive Publication Date: 2011-09-21
KK TOSHIBA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0010] However, as mentioned above, the thinning of the silicon substrate has the problem of lowering the sensitivity to the irradiation of G (green) light and R (red) light
As described above, in the conventional back-illuminated solid-state imaging device and its manufacturing method, there is a tendency that color mixing of carriers generated on the light irradiation surface side is disadvantageous.

Method used

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  • Solid-state imaging device and method of manufacturing the same
  • Solid-state imaging device and method of manufacturing the same
  • Solid-state imaging device and method of manufacturing the same

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Experimental program
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no. 1 Embodiment approach

[0043] In the following embodiments, a back side illumination type (BSI: Back side) in which the light irradiation surface (light receiving surface) is provided on the back side of the semiconductor substrate opposite to the surface of the semiconductor substrate on which the signal scanning circuit portion is formed is exemplified. illumination) solid-state imaging device. In addition, in this description, the common reference numeral is attached|subjected to the part common to all drawings.

[0044] As one embodiment, generally, one solid-state imaging device includes an n-type diffusion layer, p-type first and second diffusion layers, and a p-type a-amorphous silicon compound. The n-type diffusion layer is formed in the surface of the n-type semiconductor substrate, and functions as a charge accumulating portion for accumulating electrons generated in the semiconductor substrate by light irradiated from the back side to the front side of the semiconductor substrate. Featur...

no. 2 Embodiment approach

[0102] use below Figure 10 A solid-state imaging device according to a second embodiment will be described. In addition, only the structure different from the solid-state imaging device of the said 1st Embodiment is demonstrated, and the same reference numeral is used for the same member.

[0103]

[0104] Such as Figure 10 As shown, in the solid-state imaging device of this embodiment, when viewed from the first supporting substrate 20 side, a p-type a- SiC film 37 . The pixel isolation layer (p-type semiconductor layer) 36 and the p-type a-SiC film 37 realize a structure that functions as an element isolation region that electrically isolates adjacent photodiodes PD. That is, at least a part of the pixel isolation layer 36 is in contact with a part of the p-type a-SiC film 37 . In other words, a structure is adopted in which the pixel isolation layer 36 is connected to the p-type a-SiC film 37 in the epitaxially grown n-type semiconductor substrate 30 . Therefore, t...

no. 3 Embodiment approach

[0122] Next, a solid-state imaging device and a manufacturing method thereof according to a third embodiment will be described.

[0123]

[0124] The solid-state imaging device and its manufacturing method of the present embodiment apply the solid-state imaging device of the second embodiment to the semiconductor substrate 30 having a film thickness of 2.4 μm. In addition, only the difference from the said 2nd Embodiment is demonstrated, and the same reference numeral is attached|subjected to the same member.

[0125] Figure 14 show its shape. Figure 14 It is a cross-sectional view of the solid-state imaging device of this embodiment. As shown in the figure, a pixel isolation layer 36 and an a-SiC film 37 in contact with the pixel isolation layer 36 are respectively provided in an n-type semiconductor substrate 30 epitaxially grown to a film thickness of 2.4 μm.

[0126] In this case, the acceleration voltage at the time of forming the pixel isolation layer 36 is lowere...

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Abstract

A solid-state imaging device includes a n-type diffusion layer, first and second p-type diffusion layers, and p-type amorphous silicon compound. The n-type diffusion layer of a first conduction type is formed in a surface of a n-type semiconductor substrate of the first conduction type. The n-type diffusion layer functions as a charge accumulation part for accumulating electrons generated in the semiconductor substrate by light emitted from a back side of the semiconductor substrate to a surface side. The first and second p-type diffusion layers sandwich the charge accumulation part and are formed so as to reach the inside of the semiconductor substrate from the surface of the semiconductor substrate. The p-type amorphous silicon compound electrically isolates the charge accumulation part and is buried in the first and second trenches formed on the back side of the semiconductor substrate.

Description

[0001] Cross References to Related Applications [0002] This application is based upon and claims the benefit of priority from prior Japanese Patent Application No. 2010-064747 filed on March 19, 2010, and reference is hereby made in its entirety accordingly. technical field [0003] The present invention relates to a solid-state imaging device and a manufacturing method thereof. Background technique [0004] Recently, the miniaturization of pixels has progressed, and a backside illumination type solid-state imaging device (BSI: Back side illumination) has been proposed for the main purpose of increasing the aperture ratio, as described in Japanese Patent Application Laid-Open No. 2006-128392 . [0005] In this back-illuminated solid-state imaging device, electrons generated on the light irradiation surface side are not counted as a signal unless they contact the photodiode (PD) on the wiring side. Therefore, the sensitivity is determined by the thickness of the silicon (S...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/146H04N5/335H04N25/00
CPCH01L27/1463H01L27/1464
Inventor 山口铁也
Owner KK TOSHIBA