Method for depositing gate dielectric, method for preparing MIS capacitor and MIS capacitor

Abstract

The invention provides a method for depositing a gate dielectric, a method for preparing a MIS capacitor and a MIS capacitor. The method for depositing the gate dielectric comprises the following steps: first, pretreating the surface of a semiconductor substrate by using O2 plasma and plasma containing nitrogen so as to form a nitrogenous oxide layer on the surface of the semiconductor substrate; and then, growing a gate dielectric layer with high dielectric constant on the surface of the nitrogenous oxide layer using a plasma enhanced atomic layer deposition process, wherein, the oxide layer converts into a buffer layer with higher dielectric constant than SiO2 in the process of growth of the gate dielectric layer. Based on the method for depositing the gate dielectric, a MIS capacitor is prepared by forming a metal electrode on the upper and lower surface of the formed semiconductor structure. The invention has the advantages that: the existence of the buffer layer is capable of improving the interface characteristic between the semiconductor material and the high K gate dielectric layer, reducing the increasement of equivalent oxide thickness (EOT) and improving the electric properties.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a method for depositing a gate dielectric, a method for preparing an MIS capacitor and the MIS capacitor. Background technique [0002] With the rapid development of microelectronics technology, SiO 2 The thickness of the gate dielectric layer is getting thinner and thinner, when the SiO 2 When the thickness of the gate oxide layer is less than 1nm, the leakage current caused by direct tunneling will be so large that the device will fail. Moreover, ultra-thin SiO 2 The gate dielectric layer is also limited in terms of long-term reliability, boron penetration, and uniformity. At present, one of the effective methods to overcome these limitations is to adopt new insulating dielectric materials with high dielectric constant (high-k materials). After the high-k material is used, the physical thickness of the gate dielectric layer can be increased under the condition of ensuring the s...

AI Technical Summary

Problems solved by technology

However, existing HfO grown by conventional ALD or PEALD 2 thin film, there is inevitably a layer of SiO with low dielectric constant between it and the substrate 2 layer, and the layer SiO 2 will grow further during annealing

In addition, HfO 2 There are usually a large number of oxygen vacancies in the film, these factors will lead to an increase in the equivalent gate oxide thickness (EOT) and deterioration of electrical properties

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