High-precision time measuring circuit and method

Abstract

The invention provides a high-precision time measuring circuit and method. The high-precision time measuring circuit comprises a ring oscillator and a rough counter connected with the ring oscillator. The high-precision time measuring circuit is characterized in that the ring oscillator and the rough counter are both connected with a latch and coding circuit, and the ring oscillator and the latch and coding circuit are both connected with a calibrating circuit. The circuit provided by the invention has high precision, the resolution ratio of time measurement is delay of a first-level inverter, particularly about 50ps under the conditions of 0.35 mu m process, 25 DEG C and power supply voltage of 3.3V. The circuit is implemented in the way of a pure digital circuit and can be implemented under the condition of different processes. The circuit has simple structure and can be widely applied to the fields such as laser ranging, ultrasonic heat metering, ultrasonic flow measurement and the like.

Description

technical field [0001] The invention relates to the field of electronic measurement, in particular to a high-precision time measurement circuit and a measurement method. Background technique [0002] Time measurement is a technology that converts time intervals into digital signals. Traditional time measurement is mostly carried out by pulse counting, that is, using a high-speed clock to count within the time interval to be measured, and calculating the value based on the count value and pulse period. Time, this method is only suitable for occasions that do not require high measurement accuracy, and the accuracy is difficult to break through the ns level. In recent years, due to the continuous development of CMOS circuit technology, a new technology for time measurement using the propagation delay of the signal through the logic gate has emerged. This technology can improve the time measurement resolution to the minimum delay of a unit logic gate (at 0.35um Process, 25°C, 3...

AI Technical Summary

Problems solved by technology

However, the logic circuit delay under the CMOS process is easily affected by external factors such as voltage and temperature, and certain correction or compensation measures must be taken to ensure the accuracy of the measurement.

Due to the limitation of semiconductor manufacturing process, it is necessary to adopt complex compensation technology to ensure the stable delay of logic circuit in various process corners and application environments, and the compensation circuit needs to be designed for a specific process, which increases the difficulty of design and is not conducive to Transplantation of circuit structure and product upgrade, such as "a high-performance time-to-digital converter circuit architecture" mentioned in the invention patent with the authorized announcement number CN100539428C, the circuit architecture adopts the compensation control source method, this design method It has a strong dependence on the realization process, requires a fully customized design process, and the design complexity is high

Images