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A kind of thin goi wafer and preparation method thereof

A manufacturing method and wafer technology, which are applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of long process duration and defects in single crystal germanium, and overcome the problems of long process duration, low parasitic capacitance, The effect of simple process

Active Publication Date: 2011-12-21
SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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Problems solved by technology

[0005] In view of the above-mentioned shortcoming of prior art, the object of the present invention is to provide a kind of thin GOI wafer and preparation method thereof, to solve the problem of long duration of process in prior art, defects still exist in single crystal germanium, gradient thick buffer layer Epitaxy has technical challenges and other shortcomings

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  • A kind of thin goi wafer and preparation method thereof
  • A kind of thin goi wafer and preparation method thereof
  • A kind of thin goi wafer and preparation method thereof

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[0026] Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

[0027] It should be noted that the diagrams provided in this embodiment are only schematically illustrating the basic idea of ​​the present invention, and only the components related to the present invention are shown in the diagrams rather than the number, shape and shape of the components in actual implementation. Dimensional drawing, the type, quantity and proportion of each component can be changed arbitrarily during actual impleme...

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Abstract

The invention provides a thin GOI (germanium-on-insulator) wafer and a preparation method thereof. A high-temperature and low-temperature thin Ge film growing method is adopted, so that the defects of penetration of dislocation can be limited within the thin film. Moreover, the SmartCut technology is combined for preparation of a controlled GOI substrate with a top thin Ge film with the thickness of dozens to hundreds of nanometers. The characteristics of Ge materials and SOI (silicon-on-insulator) materials are combined in the GOI substrate, and the formed device has high carrier mobility, low parasitic capacitance, high resistance to radiation effects and simplified isolation performance. Moreover, the method can be used for preparing GOI layers with strain or complete relaxation to meet requirements of different devices. The preparation method has a simple process and can be applied in large-scale industrial production.

Description

technical field [0001] The invention relates to a wafer and a preparation method thereof, in particular to a thin GOI wafer and a preparation method thereof. Background technique [0002] SOI (Silicon-On-Insulator, silicon on insulating substrate) technology introduces a buried oxide layer between the top silicon and the back substrate. By forming a semiconductor thin film on an insulator, the SOI material has the incomparable advantages of bulk silicon: it can realize the dielectric isolation of components in integrated circuits, and completely eliminate the parasitic latch effect in bulk silicon CMOS circuits; The integrated circuit also has the advantages of small parasitic capacitance, high integration density, fast speed, simple process, small short channel effect, and is especially suitable for low-voltage and low-power circuits. Therefore, it can be said that SOI will likely become a deep submicron low-voltage , The mainstream technology of low-power integrated circu...

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Application Information

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IPC IPC(8): H01L21/762
Inventor 张苗陈达卞剑涛姜海涛薛忠营
Owner SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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