Field-programmable gate array (FPGA) configuration device and configuration method

Abstract

The invention relates to a field-programmable gate array (FPGA) configuration device, which is used for sending a configuration file stored in an intelligent card to an FPGA. The FPGA configuration device comprises a microprocessor, an FPGA interface which is connected with the microprocessor, an intelligent card interface which is connected with the microprocessor and used for the intelligent card to insert, and a switch selection module which is connected with the microprocessor and used for reading an input number, wherein the microprocessor performs data transmission with the intelligent card through the intelligent card interface, selects the configuration file corresponding to the number in the intelligent card according to the number read by the switch selection module, and sends the selected configuration file to the FPGA through the FPGA interface. The invention also provides an FPGA configuration method. By the device and the method, cost is saved, and development and verification efficiency is improved.

Description

technical field [0001] The invention relates to a configuration device and a configuration method, in particular to an FPGA configuration device and a configuration method. Background technique [0002] FPGA (Field-Programmable Gate Array), namely Field Programmable Gate Array, appeared as a semi-custom circuit in the field of application-specific integrated circuits. The disadvantage of the limited number of gate circuits will be used extensively during the development and verification of electronic systems. When the FPGA is working, it is necessary to configure the internal circuit connection relationship, usually by reading the data in a data memory that stores FPGA configuration files, that is, EPROM (Erasable Programmable Read-Only Memory, Erasable Programmable Read-Only Memory) into In the on-chip programming RAM (Random Access Memory, random access memory), after the configuration is completed, the FPGA enters the working state; after power-off, the FPGA returns to a...

AI Technical Summary

Problems solved by technology

The configuration file is generated by the FPGA development software. Usually, a dedicated configuration chip is used to configure the FPGA. A configuration chip can only accommodate one configuration file at a time. Not only is the price expensive, the capacity is limited, and the speed of updating data is relatively slow Slow, causing a lot of inconvenience to practical applications

[0003] In addition, in the actual development and verification, it is often necessary to update the FPGA configuration multiple times, or to compare the differences in the actual functions of multiple configuration files, the configuration files need to be replaced frequently, and the configuration chip needs to be continuously programmed by relying on a dedicated configuration chip. Not only is the speed slow, but it is also easy to confuse different configuration file functions, affecting development and verification efficiency

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