Embedded static random access memory (SRAM) test structure and test method based on institute of electrical and electronics engineers (IEEE) 1500

A technology of memory testing and testing methods, applied in static memory, instruments, etc., can solve the problems of system design efficiency impact, inability to effectively solve the problem of embedded SRAM test multiplexing, etc., and achieve the effect of improving integration efficiency

Inactive Publication Date: 2012-01-25
GUILIN UNIV OF ELECTRONIC TECH
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Problems solved by technology

[0002] Most of the currently known embedded SRAM tests adopt the built-in self-test method, which can realize the detection of memory faults, but the existing methods cannot effectively solve the test multiplexing problem

Method used

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  • Embedded static random access memory (SRAM) test structure and test method based on institute of electrical and electronics engineers (IEEE) 1500
  • Embedded static random access memory (SRAM) test structure and test method based on institute of electrical and electronics engineers (IEEE) 1500
  • Embedded static random access memory (SRAM) test structure and test method based on institute of electrical and electronics engineers (IEEE) 1500

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Embodiment Construction

[0029] The specific implementation manners of the present invention will be described in detail below in conjunction with the accompanying drawings and embodiments.

[0030] like figure 2 As shown, an embedded SRAM memory test structure based on IEEE 1500, including a BIST test controller and an embedded SRAM packaged test shell based on IEEE 1500 standards, the test shell receives control signals and command signals sent by the BIST test controller , test address data, test stimulus data, and test response The data is output to the BIST test controller, and the test shell Wrapper surrounds the tested embedded SRAM. The components in the test shell conform to the functional description of the IEEE 1500 standard; the BIST test controller has a clock signal, a state mode control signal port, and a test controller The control signal output port of the test shell Wrapper is connected to the corresponding port of the test shell; the data output port WSO of the test shell is conn...

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Abstract

The invention discloses an embedded static random access memory (SRAM) test structure and an embedded SRAM test method based on institute of electrical and electronics engineers (IEEE) 1500. Methods for IEEE1500 standard for embedded core test and built-in self test (BIST) are combined in the test structure; the embedded SRAM test structure consists of a test shell package of an embedded SRAM and a SRAM test controller, wherein the test shell package is used for solving the problems of test access, test isolation and test control of the embedded SRAM; and the SRAM test controller is used for generating test incentive data, controlling a package shell Wrapper, performing response analysis and outputting a test result according to a test algorithm. By adoption of the test structure and the test method, a fault existing in the embedded SRAM can be detected, the test reuse of the embedded SRAM is facilitated, and the integration efficiency of system on a chip (SoC) can be effectively improved.

Description

technical field [0001] The invention relates to a test structure and a test method of an embedded SRAM in a SoC chip. Background technique [0002] Most of the currently known embedded SRAM tests adopt the built-in self-test method, which can realize the detection of memory faults, but the existing methods cannot effectively solve the test multiplexing problem of the embedded SRAM. Because there is no standardized and unified test structure, different SoC designers have different specific structures for SRAM built-in self-test, and the design efficiency of the system is greatly affected. Contents of the invention [0003] Aiming at the deficiencies of the prior art, the present invention proposes a test structure and test method for SRAM type memory in SoC capable of test multiplexing on the basis of fully studying IEEE 1500 standard and built-in self-test (BIST). [0004] The basic structure of embedded SRAM testing based on IEEE 1500 standard includes: access, control ...

Claims

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Application Information

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IPC IPC(8): G11C29/08
Inventor 谈恩民马江波
Owner GUILIN UNIV OF ELECTRONIC TECH
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