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Method for testing chip of phase change memory

A phase-change memory and chip testing technology, which is applied in the field of micro-nano electronics, can solve the problems of non-phase-change memory chip test methods and test systems, and achieve high test efficiency, easy automated test, and high flexibility.

Active Publication Date: 2014-03-05
HUAZHONG UNIV OF SCI & TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Because the phase change memory chip uses a new type of phase change material as the basic storage medium, it is still in the research and development stage, and there is no standardized phase change memory chip test method and test system at home and abroad.

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  • Method for testing chip of phase change memory
  • Method for testing chip of phase change memory
  • Method for testing chip of phase change memory

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example

[0064] The schematic diagram of the storage array of the phase-change memory chip used in this example test is as follows Figure 5 As shown, the word line is WL, and the bit line is BL. The overall structure of a phase change memory chip is shown in Image 6 As shown, it includes a memory cell array 51 , a word line decoder 52 , a logic control module 53 , a write module 54 , a read module 55 , an input / output port control module 56 and a bit line decoder 57 . The operation method of this chip is to firstly set the erasing current value of the chip by setting the external resistance value at Rbias0 and Rbias1, and then apply a high level at CSB to select the chip, select the word line and bit line, and apply the read and write current value at RD_WRL. Or write pulse to read or write data to the selected address unit at the IO port.

[0065] The example of testing system of the present invention selects multifunctional test card 104 models as PCI-4065, produced by U.S. NI Co...

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Abstract

The invention discloses a method and a system for testing a chip of a phase change memory. The method for testing the chips of the phase change memory can accurately measure a read-write circuit and a gating circuit in the chip of the phase change memory and the addressing capability, the random read-write capability, the anti-crosstalk capability and the initial value detection of the chip of the phase change memory, and can accurately search for an appropriate erase-write pulse parameter. The test system which comprises a master control computer, control software, a lower computer microcontroller, a digital I / O acquisition card, a multifunctional test card, a pulse signal generator, a chip interface circuit, a current limiting stabilized power supply and a transition connecting part is characterized in that: the master control computer is connected with the lower computer microcontroller, the digital I / O acquisition card is connected with the multifunctional test card, and the I / O acquisition card is also connected with the pulse signal generator and the chip interface circuit; and the I / O port of the lower computer is connected with the chip interface circuit, the pulse signal generator is connected with the chip interface circuit, and the multifunctional test card is connected with the chip interface circuit. The function test of the chip of the phase change memory is completed by calling a corresponding test module.

Description

technical field [0001] The invention belongs to the technical field of micro-nano electronics, and in particular relates to a testing method of a phase-change memory chip and a system thereof. Background technique [0002] Phase-change memory (PCRAM) is an element based on the Ovsinski effect, and its core is a chalcogenide-based phase-change material. The storage medium of PCRAM can realize reversible transition between amorphous state and crystalline state under thermal induction. When the storage medium is in amorphous state and crystalline state, it will show different optical characteristics and resistance characteristics. States can be used to represent "0" and "1" respectively to store data. However, the power consumption required for the phase transition of chalcogenide materials can be greatly reduced only in the case of micron or even nanoscale, so although Stanford R.Ovshinsky reported in Physical Review Letters in 1968 that chalcogenides (Ge 10 Si 12 As 30 Te...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C29/56
Inventor 李震张乐瞿力文缪向水
Owner HUAZHONG UNIV OF SCI & TECH