Failure message integrated device based on FPGA and ARM hardware platform

Abstract

The invention discloses a failure message integrated device based on FPGA and ARM hardware platform, which comprises a PT/CT board, an ARM board, a network switch board, a serial port board, a GPS board and a high speed acquisition board composed of an A/D sampling chip and an FPGA; the FPGA has a DDR2 controller, an DMA controller, an FIFO memory and an FIR low-pass filter; and the FPGA is also provided with a starting algorithm module and a fault recorder module. The device organically combines the functions of the fault recorder, a travelling wave distance measuring device and a failure message management sub-station by using parallel processing capability of the high speed AD chip and the FPGA, for realizing accurate localization of fault points when a power transmission line in an electric power system has a fault, and obtaining a complete fault report, thereby complying with intelligentization and miniaturization needs of secondary device of power grid.

Description

technical field [0001] The present invention relates to a fault information synthesis device based on FPGA and ARM hardware platform, especially a fault information collection of secondary side protection device in the power system, which realizes precise fault location by analyzing high-frequency transient signals, and can list A facility for detailed fault reporting. Background technique [0002] With the improvement of substation automation, information from secondary equipment in substations has increasingly become an important basis for accident analysis and system recovery. In order to collect this information, each substation has put into operation a large number of information collection devices and fault location devices, such as fault information management substations, traveling wave ranging devices, fault recorders, etc. These devices can reflect the information when the power grid fails, but their functions are relatively single, and some aspects are even repea...

AI Technical Summary

Problems solved by technology

This sampling rate is difficult to meet the requirements for the general microprocessor to directly control the AD conversion module, so it needs to be realized by using a high-speed acquisition circuit based on FPGA. However, there is no public report of the relevant technical solution so far.

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