PMOS (p-channel metal-oxide-semiconductor field-effect transistor) source/drain region ion implantation method and corresponding device manufacturing method

A device manufacturing method and ion implantation technology, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as the uneven depth of ultra-shallow junctions, and achieve the effect of reducing the difficulty of the process
CN102437028AActive Publication Date: 2012-05-02SHANGHAI HUALI MICROELECTRONICS CORP
5 Cites 12 Cited by

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
SHANGHAI HUALI MICROELECTRONICS CORP
Publication Date
2012-05-02

Smart Images

  • Figure 1
    Figure 1
  • Figure 2
    Figure 2
  • Figure 3
    Figure 3
Patent Text Reader

Abstract

The invention discloses a PMOS (p-channel metal-oxide-semiconductor field-effect transistor) source / drain region ion implantation method and a corresponding device manufacturing method. Since an amorphous carbon layer can be completely removed without causing silicon sinking, when the amorphous carbon layer is used as a pad layer for PMOS source / drain region ion implantation, the range of implanted impurities in the silicon substrate can be reduced on the premise of basically not changing the implanted impurity distribution, thereby obtaining an ultrashallow junction which is more shallow than that obtained by a conventional method; or the implanted energy is increased on the premise of keeping the depth of the ultrashallow junction unchanged, thereby relieving the demands of technique for high-dose low-energy ion implantation to some extent, and lowering the technical difficulty of PMOS source / drain region ion implantation. The PMOS source / drain region ion implantation method and the corresponding device manufacturing method provided by the invention can be used for improving the ion implantation technique of the ultrashallow junction in the PMOS source / drain region, and lowering the technical difficulty.
Need to check novelty before this filing date? Find Prior Art

Description

technical field

[0001] The invention relates to the field of semiconductor manufacturing, in particular to a PMOS source-drain region ion implantation method and a corresponding device manufacturing method. Background technique

[0002] With the rapid development of semiconductor manufacturing technology, in order to achieve high integration, the size of semiconductor devices is constantly shrinking. In the manufacturing process of P-channel metal-oxide-semiconductor (PMOS) devices and complementary metal-oxide-semiconductor (CMOS) devices, due to the continuous shrinking of the device size, the requirements for the junction depth of the source and drain regions are becoming shallower and shallower, and the energy of ion implantation The requirements are lower and lower, and the dose of ion implantation is higher and higher, which makes the ion implantation process for forming the ultra-shallow junction of the source and drain regions more complicated.

[0003] In the deep ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More