The invention relates to a 
transistor and a 
transistor forming method, wherein the 
transistor forming method comprises the following steps that a 
semiconductor substrate is provided; at least two grooves are formed in the 
semiconductor substrate; insulation 
layers filling the grooves are formed in the grooves, and in addition, the tops of the insulation 
layers are set to be lower than the surface of the 
semiconductor substrate; epitaxial 
layers are formed on the surface and the side wall of the semiconductor substrate higher than the tops of the isolation layers, and in addition, the epitaxial layers are enabled to cover the partial isolation layers arranged at the two sides of the semiconductor substrate; a well region is formed in the semiconductor substrate and the epitaxial layers; a gate 
electrode structure is formed on the surface of each epitaxial layer, wherein each gate 
electrode structure comprises a 
gate dielectric layer covering the surface of the corresponding epitaxial layer and a gate conducting layer positioned on the top of the grate 
dielectric layer; light 
doping regions are formed in the epitaxial layers arranged at the two sides of the grate conducting layers; a heavy 
doping region is formed in each light 
doping region, and in addition, the heavy doping regions and the well region are isolated by the light doping regions and the isolation layers. The transistor formed by the method provided by the invention has low 
power consumption, the operation speed is high, the groove dimension is small, and in addition, the warping effect can be effectively eliminated.