Unlock instant, AI-driven research and patent intelligence for your innovation.

Shallow trench isolation (STI) structure chemical mechanical polishing (CMP) method and STI structure manufacture method

A protective layer, silicon nitride technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as increasing process complexity and unfavorable wafer surface flatness, reducing process complexity and improving flatness degree of effect

Active Publication Date: 2012-05-02
SHANGHAI HUALI MICROELECTRONICS CORP
View PDF7 Cites 7 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] For this three-layer film structure, the usual STI-CMP polishing will stop on the silicon nitride (liner nitride) protection layer at the end, thus requiring additional wet steps to remove the silicon nitride protection layer, silicon oxide protection layer, And silicon nitride barrier layer and silicon oxide barrier layer, which increases the process complexity and is not conducive to the flatness of the wafer surface

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Shallow trench isolation (STI) structure chemical mechanical polishing (CMP) method and STI structure manufacture method
  • Shallow trench isolation (STI) structure chemical mechanical polishing (CMP) method and STI structure manufacture method
  • Shallow trench isolation (STI) structure chemical mechanical polishing (CMP) method and STI structure manufacture method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0042] Referring to Fig. 1 and Fig. 2, the STI structure manufacturing method and the CMP method steps of the present invention include:

[0043]In step 1, a silicon dioxide barrier layer 2 and a silicon nitride barrier layer 3 are sequentially deposited on the silicon substrate 1; the specific deposition method can be implemented with reference to the prior art, such as the patent CN1138872C, the document "Photochemical Vapor Deposition of Silicon Nitride" Technology and Its Application Research" (Microelectronics and Computer, 1995 (3): 45).

[0044] Step 2, define shallow trench isolation regions 10 on the silicon substrate by photolithography and etching, the specific method can be implemented with reference to the prior art, such as the method disclosed in patent CN101447424B.

[0045] Step 3, sequentially depositing a silicon dioxide protective layer 4 and a silicon nitride protective layer 6 in the shallow trench to form a double inner wall protective layer;

[0046] S...

Embodiment 2

[0053] Referring to Fig. 1 and Fig. 2, the STI structure manufacturing method and the CMP method steps of the present invention include:

[0054] In step 1, a silicon dioxide barrier layer 2 and a silicon nitride barrier layer 3 are sequentially deposited on the silicon substrate 1; the specific deposition method can be implemented with reference to the prior art, such as the patent CN1138872C, the document "Photochemical Vapor Deposition of Silicon Nitride" Technology and Its Application Research" (Microelectronics and Computer, 1995 (3): 45).

[0055] Step 2, define shallow trench isolation regions 10 on the silicon substrate by photolithography and etching, the specific method can be implemented with reference to the prior art, such as the method disclosed in patent CN101447424B.

[0056] Step 3, sequentially depositing a silicon dioxide protective layer 4 and a silicon nitride protective layer 6 in the shallow trench to form a double inner wall protective layer;

[0057] ...

Embodiment 3

[0064] Referring to Fig. 1 and Fig. 2, the STI structure manufacturing method and the CMP method steps of the present invention include:

[0065] In step 1, a silicon dioxide barrier layer 2 and a silicon nitride barrier layer 3 are sequentially deposited on the silicon substrate 1; the specific deposition method can be implemented with reference to the prior art, such as the patent CN1138872C, the document "Photochemical Vapor Deposition of Silicon Nitride" Technology and Its Application Research" (Microelectronics and Computer, 1995 (3): 45).

[0066] Step 2, define shallow trench isolation regions 10 on the silicon substrate by photolithography and etching, the specific method can be implemented with reference to the prior art, such as the method disclosed in patent CN101447424B.

[0067] Step 3, sequentially depositing a silicon dioxide protective layer 4 and a silicon nitride protective layer 6 in the shallow trench to form a double inner wall protective layer;

[0068] ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a shallow trench isolation (STI)-chemical mechanical polishing (CMP) method for a silicon oxide / silicon nitride double inner wall protection layer and a method for manufacturing an STI structure by the STI-CMP method. Grinding liquid with higher grinding speed ratio of the silicon oxide to the silicon nitride is used for removing a trench silicon dioxide filling layer, the operation is stopped on a silicon nitride protection layer, then, grinding liquid with a higher grinding speed ratio of the silicon nitride to the silicon oxide is used for grinding the silicon nitride protection layer, after the silicon nitride protection layer is completely removed, the original grinding liquid with the higher grinding speed ratio of the silicon oxide to the silicon nitride is used for grinding a silicon dioxide protection layer, and finally, the operation is stopped on a silicon nitride blocking layer. Therefore, the wet etching step for additionally removing the silicon nitride protection layer and the silicon dioxide protection layer in the traditional STI manufacture method is avoided, the process complexity is reduced, and the flatness of the wafer surface is favorably improved.

Description

technical field [0001] The present invention relates to a manufacturing process of electronic components, in particular to a chemical mechanical polishing method for a shallow trench isolation structure of a silicon oxide / silicon nitride double inner wall protective layer, and using the method to manufacture the shallow trench isolation structure Methods. Background technique [0002] In a semiconductor manufacturing process, shallow trench isolation (Shallow Trench Isolation, or STI) technology is widely used as a device isolation technology. As shown in Figure 1, the common STI process flow is: first deposit a layer of silicon oxide (pad oxide) and silicon nitride (pad nitride) on a silicon substrate (substrate) 1 in sequence, where the silicon oxide layer is used as the silicon lining The bottom protective layer, silicon nitride as a barrier layer for subsequent etching and chemical mechanical polishing processes ( Figure 1a ). Then through photolithography and etching...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/3105H01L21/762
Inventor 方精训邓镭
Owner SHANGHAI HUALI MICROELECTRONICS CORP