PIN device in bipolar complementary metal oxide semiconductor (BiCMOS) process

A device and process technology, applied in the field of semiconductor integrated circuit devices, can solve the problems of uneven forward conductor current and large series resistance, and achieve the effects of uniform current, improved characteristics and reduced series resistance
CN102446978BActive Publication Date: 2013-09-11SHANGHAI HUAHONG GRACE SEMICON MFG CORP
2 Cites 0 Cited by

Patent Information

Authority / Receiving Office
CN ยท China
Patent Type
Patents(China)
Current Assignee / Owner
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
Publication Date
2013-09-11

Smart Images

  • Figure 1
    Figure 1
  • Figure 2
    Figure 2
  • Figure 3
    Figure 3
Patent Text Reader

Abstract

The invention discloses a PIN device in a bipolar complementary metal oxide semiconductor (BiCMOS) process. The PIN device is formed on a P-type silicon substrate; an active region is isolated through a shallow slot field oxide; and on an overlook surface, the layout structure of the PIN device is octagonal, polygonal over octagonal or round. On a cross section, the PIN device comprises an N-type region, an I-type region and a P-type region, wherein the N-type region consists of a shallow slot field oxide bottom of two sides of the active region and an N-type embedded layer in a transverse distance away from the active region and is led out through deep hole contact; the I-type region consists of an N-type collector implantation region formed in the active region; and the P-type region consists of an intrinsic base region epitaxial layer which is formed on the surface of the active region and doped with P-type impurities. The series resistance of the device can be effectively reduced, the forward conduction current of the device is improved, the current of the device is more uniform in each direction, and the properties of the device are improved.
Need to check novelty before this filing date? Find Prior Art

Description

technical field

[0001] The invention relates to a semiconductor integrated circuit device, in particular to a PIN device in BiCMOS technology. Background technique

[0002] The bipolar transistor (Bipolar Transistor) in the existing BiCMOS process uses a highly doped buried layer in the collector area to reduce the resistance of the collector area, and uses high-concentration and high-energy N-type implantation to connect the buried layer in the collector area to form a collector Electrode lead-out (collector pick-up). On the buried layer of the collector region, epitaxial low-medium doped collector region, in-situ P-type doped epitaxy forms the base region, and then N-type heavily doped polysilicon constitutes the emitter, and finally completes the production of Bipolar Transistor. Such as figure 1 Shown is a schematic diagram of the cross-sectional structure of the first PIN device in the existing BiCMOS process. The existing first PIN device includes: an N-type region,...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More