50results about How to "Increase the forward conduction current" patented technology

The invention provides a Schottky device with a groove structure, comprising an anode electrode (1), a silicon dioxide layer (2), a P+ protection ring (3), a Schottky contact part (4), a P-type doping region (5), an N-type drift region (6), an N+ substrate region (7) and a cathode electrode (8); the groove structure is etched in the N-type drift region (6); the P-type doping region (5) is firstly formed in a groove; and then Schottky Metal sputtering is performed so as to form the Schottky contact part in the groove. The groove is etched in a drift region in an ordinary SBD structure to firstly form the P-type doping region, and then Schottky metal and the N-type drift region are sputtered to form the Schottky contact. Without sacrificing the reverse characteristic of the device, the forward conducting current of the Schottky device is improved. The implementing technique and the junction barrier control the JBS technique of a Schottky diode to be compatible, thus being easy to realize, and the requirements of a modern electronic system can be met better.

The invention discloses a GaN hetero-junction diode device and a method for manufacturing the same. The GaN hetero-junction diode device comprises a substrate, a buffer layer, a channel layer, a potential barrier layer, a cap layer, a first Ohm anode, an Ohm cathode and a second Ohm anode. The buffer layer is positioned on the substrate; the channel layer is positioned on the buffer layer; the potential barrier layer is positioned on the channel layer, the potential barrier layer and the channel layer form a hetero-structure, and a two-dimensional electric channel is formed at a hetero-junction interface; the cap layer is positioned on the potential barrier layer; the first Ohm anode and the Ohm cathode are positioned on the upper side of the potential barrier layer and are arranged on two sides of the cap layer, and the first Ohm anode is in contact with the cap layer; the second Ohm anode is positioned on the first Ohm anode and the cap layer and is in Ohm metal contact with the cap layer. The GaN hetero-junction diode device and the method have the advantages that the problem of conflict between forward start voltage control and reverse electric leakage in the prior art can be solved, and a diode has characteristics of low start voltages and turn-on resistance and high reverse withstand voltages and forward turn-on currents.

The invention discloses a parasitic PIN(positive-intrinsic negative) diode in a BiCMOS(Bipolar Complementary Metal Oxide Semiconductor) process, comprising an N type region, an I type region and a P type region, wherein the I type region is composed of multiple N type collector injection regions formed in multiple adjacent active regions; the N type region is composed of an N type buried layer formed at the bottom of a shallow trench isolation oxide layer on the side of the I type region; the P type region is composed of multiple base region epitaxial layers and multiple P type buried layers; the base region epitaxial layers are respectively formed on the top surfaces of the active regions in the I type region; and each P type buried layer is formed on the bottom and side wall of the shallow trench isolation oxide layer in the I type region. The invention also discloses a manufacturing method of the parasitic PIN diode in the BiCMOS process. The invention realizes the aim of providing one more device choice for a circuit without additional process conditions, lower insertion loss and higher isolation are achieved, and the forward on state current of the device is increased and the insertion loss of the device improved while the device area is not increased.

The invention relates to a dual-conductive type discrete dual-rectangular grid-controlled source-drain variable resistance transistor and a manufacturing method thereof. The transistor has a functionthat a P conductive type and an N conductive type can be freely switched and a bidirectional switch function, has the advantages of low static power consumption, low reverse leakage current, relatively high grid control capability and low sub-threshold amplitude and has the characteristics of a dual-rectangular grid discrete control structure. Compared with a conventional MOSFETs device, the transistor has the advantages that more excellent sub-threshold characteristic and switch characteristic are achieved by a Schottky barrier tunneling effect, and the static power consumption of the transistor is reduced; and compared with a conventional tunneling field-effect transistor, the transistor has the bidirectional switch characteristic which a source and a drain are symmetric and can be changed with each other and which are not possessed by the conventional tunneling field-effect transistor, the function that the P conductive type and the N conductive type can be freely switched and whichcannot be achieved by various existing transistor technologies are achieved, thus, a wider and versatile logic function is provided for an integrated circuit design unit, and the transistor is suitable for promotion and application.

The invention relates to a unit structure for reducing power consumption of a phase-change memory and a preparation method thereof. The unit structure comprises an integrated circuit substrate, a first insulating medium layer, a driving diode, a transition layer, a second insulating medium layer, a bottom electrode, a third insulating medium layer, a phase-change material layer and a top electrode, wherein the first insulating medium layer is positioned on the integrated circuit substrate; the driving diode is surrounded by the first insulating medium layer and connected with the integrated circuit substrate; the transition layer is surrounded by the first insulating medium layer and positioned on the driving diode; the second insulating medium layer is positioned on the first insulating medium layer; the bottom electrode is surrounded by the second insulating medium layer and positioned on the transition layer; the third insulating medium layer is positioned on the second insulating medium layer; the phase-change material layer is surrounded by the third insulating medium layer and positioned on the bottom electrode; the top electrode is positioned on the phase-change material layer; and the heat conductivity of the transition layer is 0.01 to 20 W/m.K. The structure can effectively reduce the heat loss from the bottom electrode, improve the heating efficiency and improve the forward breakover current by heating the driving diode so as to achieve the purpose of reducing the power consumption of the phase-change memory.

A silicon carbide junction barrier Schottky diode, comprising: a silicon carbide N-type substrate; a silicon carbide N-type drift region, and a silicon carbide P-type layer, which are sequentially stacked on the upper surface of the silicon carbide N-type substrate; A plurality of grooves are vertically opened downward on the top of the silicon carbide P-type layer, and the depth d of the grooves satisfies d ₂ <d<d ₁ +d ₂ , where d ₁ is the thickness of the SiC N-type drift region, d ₂ is the thickness of the silicon carbide P-type layer; the P+ injection layer is arranged at the bottom of the plurality of grooves; and the anode electrode is formed at least on the sidewalls of the plurality of grooves, and the silicon carbide junction barrier The special base diode takes advantage of the area of ​​the side wall to increase the current conduction area, increase the conduction current, save the chip area, and strengthen the pinch-off ability of exhaustion, reduce the leakage current during reverse bias, and improve the reverse bias device reliability.

The invention relates to a conductive-type adjustable source-drain variable resistance dual-side folded transistor and a manufacturing method thereof. The transistor has a function that a P conductivetype and an N conductive type can be freely switched and a bidirectional switch function and has the advantages of low static power consumption, low reverse leakage current, relatively high grid control capability and low sub-threshold amplitude. Compared with a conventional MOSFETs device, the transistor has the advantages that more excellent sub-threshold characteristic and switch characteristic are achieved by a Schottky barrier tunneling effect, and the static power consumption of the transistor is reduced; and compared with a conventional tunneling field-effect transistor, the transistorhas the bidirectional switch characteristic which a source and a drain are symmetric and can be changed with each other and which are not possessed by the conventional tunneling field-effect transistor, the function that the P conductive type and the N conductive type can be freely switched and which cannot be achieved by various existing transistor technologies are achieved, thus, a wider and versatile logic function is provided for an integrated circuit design unit, and the transistor is suitable for promotion and application.

The invention relates to a bracket-shaped grid-control source drain resistive two-way switch transistor and a manufacturing method thereof. According to the bracket-shaped grid-control source drain resistive two-way switch transistor, a device is structurally characterized by comprising bracket grids symmetrical left and right and has strong grid control capability and can control a metal source and drain interchangeable area as a source area or a drain area by adjusting a source and drain interchangeable electrode voltage to change the tunneling current direction. The bracket-shaped grid-control source drain resistive two-way switch transistor has the advantages of being low in static power and reverse leakage current, high in grid control capacity, low in subthreshold value swing and capable of achieving the two-way switching function. Compared with an ordinary MOSFETs type device, the tunneling effect is used for achieving a more excellent switching characteristic. Compared with anordinary tunneling field effect transistor, the bracket-shaped grid-control source drain resistive two-way switch transistor has the interchangeable source and drain two-way symmetrical switching characteristic with which the ordinary tunneling field effect transistor lacks, and therefore the bracket-shaped grid-control source drain resistive two-way switch transistor is suitable for application and popularization.

The invention relates to a high-integrated groove insulated gate tunneling bipolar enhancement transistor. Compared with MOSFETs or TFETs devices of the same size, a superior switching characteristic is realized by utilizing the extremely sensitive relationship between tunneling insulated layer impedance and an internal field; a superior positive conducting characteristic is realized by enhancing a tunneling signal by an emitter; compared with an ordinary plane structure, the situation that an emitter region 3, a base region 4 and a collector region 5 are successively arrayed in a horizontal direction is avoided, so that the area of a chip is reduced, and higher integration can be realized. In addition, the invention further provides a concrete manufacture method of the high-integrated groove insulated gate tunneling bipolar enhancement transistor. The transistor obviously improves the working characteristics of a nanoscale integrated circuit unit and is suitable for popularization and application.

The invention relates to an insulated gate tunneling bipolar transistor with a U-shaped tunneling insulating layer. A gate electrode tunneling current is generated by the U-shaped tunneling insulating layer, and the very sensitive mutual relation between impedance of the tunneling insulating layer and intensity of an internal electric field of the tunneling insulating layer is utilized to enable the U-shaped tunneling insulating layer to implement conversion between a high impedance state and a low impedance state in a very short electric potential change interval of a gate electrode, and thus, compared with the prior art, the insulated gate tunneling bipolar transistor can realize a better switching characteristic; by bipolar amplification, the positive conduction characteristic of a nanoscale insulated gate transistor is obviously improved. The invention also discloses a specific manufacturing method of the insulated gate tunneling bipolar transistor with the U-shaped tunneling insulating layer. Therefore, the working characteristic of a nanoscale integrated circuit unit is obviously improved, and the insulated gate tunneling bipolar transistor and the manufacturing method are suitable for being popularized and applied.

A silicon carbide device epitaxial structure and a preparation method thereof relate to the technical field of semiconductor devices. The method comprises the following steps: growing a silicon carbide epitaxial layer on a substrate; depositing a first barrier layer on the silicon carbide epitaxial layer; etching the first barrier layer to form a first window exposing the silicon carbide epitaxial layer, and implanting N-type ions through the first window to form an N-type ion implantated region in the silicon carbide epitaxial layer; growing a continuous second barrier layer on the first barrier layer and in the first window, wherein the second barrier layer is enclosed in the first window to form a second window; etching the second barrier layer to expose the N-type ion implanted region at the second window, and reserving the second barrier layer on the side wall of the first window to form a side wall structure; and forming a P-type ion implanted region in the N-type ion implanted region through ion implantation, wherein the implantation depth of the P-type ion implanted region in the silicon carbide epitaxial layer is greater than that of the N-type ion implanted region in the silicon carbide epitaxial layer.

The invention relates to a source-drain resistive random bidirectional switching field effect transistor and a manufacturing method thereof. The device has the structural characteristic of bilateral symmetry, and a metal source-drain interchangeable region is controlled to act as a source region or a drain region by adjusting the source-drain interchangeable electrode voltage so as to change the direction of schottky barrier tunneling current. The device has the advantages of low static power consumption reverse leakage current and low sub-threshold swing and can realize the bidirectional switching function. Compared with the common MOSFETs type device, the intensity of the schottky barrier tunneling effect is controlled by using the gate electrode to change the resistance value of the source region and the drain region so as to realize the better switching characteristic; compared with the tunneling field effect transistor, the bidirectional switching field effect transistor has the source-drain interchangeable bidirectional symmetrical switching characteristic which is not possessed by the common tunneling field effect transistor and higher forward conduction characteristic; andcompared with the common schottky barrier transistor, the bidirectional switching field effect transistor has the advantages of high technology implementation and better reverse switching characteristic so as to be suitable for popularization and application.

The invention relates to an AlGaN-based double-channel Schottky diode based on a groove anode structure and a preparation method. The diode comprises a substrate, a buffer layer, a channel layer, a first barrier layer, a superlattice layer, a second barrier layer and a GaN cap layer, an anode and a cathode; the substrate, the buffer layer, the channel layer, the first barrier layer, the superlattice layer, the second barrier layer and the GaN cap layer are sequentially stacked from bottom to top; a first conductive channel is formed between the channel layer and the first barrier layer; a second conductive channel is formed between the superlattice layer and the second barrier layer; the anode is arranged on the GaN cap layer; the bottom of the anode sequentially penetrates through the GaN cap layer and the second barrier layer; the anode is located in the superlattice layer; the anode and the superlattice layer form Schottky contact; the cathode is arranged on the GaN cap layer and surrounds the periphery of the anode; a distance exists between the cathode and the anode; and the cathode and the GaN cap layer form ohmic contact. According to the AlGaN-based double-channel Schottky diode based on the groove anode structure, the conductive channels are adopted, so that the electron concentration is improved, and the on-resistance is reduced.

The invention discloses a PIN device in a bipolar complementary metal oxide semiconductor (BiCMOS) process. The PIN device is formed on a P-type silicon substrate; an active region is isolated through a shallow slot field oxide; and on an overlook surface, the layout structure of the PIN device is octagonal, polygonal over octagonal or round. On a cross section, the PIN device comprises an N-typeregion, an I-type region and a P-type region, wherein the N-type region consists of a shallow slot field oxide bottom of two sides of the active region and an N-type embedded layer in a transverse distance away from the active region and is led out through deep hole contact; the I-type region consists of an N-type collector implantation region formed in the active region; and the P-type region consists of an intrinsic base region epitaxial layer which is formed on the surface of the active region and doped with P-type impurities. The series resistance of the device can be effectively reduced,the forward conduction current of the device is improved, the current of the device is more uniform in each direction, and the properties of the device are improved.

The invention relates to a double-selection conductive type dual-bracket grid-controlled source-drain variable resistance transistor and a manufacturing method thereof. The device has structural characteristics of folded auxiliary grid, dual-bracket grid and a left side and a right side which are symmetric to each other, the function that a P conductive type and an N conductive type can be freelyswitched can be achieved, and the transistor has the advantages of low static power consumption, low reverse leakage current, relatively high grid control capability and low sub-threshold amplitude. Compared with a conventional MOSFETs device, the transistor has the advantages that more excellent switch characteristic is achieved by a tunneling effect; and compared with a conventional tunneling field-effect transistor, the transistor has the bidirectional switch characteristic which a source and a drain can be symmetric to each other and can be exchanged and which is not possessed by the conventional tunneling field-effect transistor, the function that the P conductive type and the N conductive type can be freely switched and that cannot be achieved by the prior art is achieved, thus, wider and more versatile logic functions are provided for an integrated circuit design unit, and the transistor is suitable for promotion and application.

A silicon carbide PiN diode with a buried layer structure comprises a cathode, an N-type silicon carbide substrate, an N-type silicon carbide epitaxial layer, a P-type region and a metal anode which are sequentially arranged from bottom to top. An N-type buried layer and/or a P-type buried layer are/is further arranged in the N-type silicon carbide epitaxial layer. The N-type buried layer is located above the N-type silicon carbide substrate and used for enhancing the electric field at the boundary of the N-type silicon carbide substrate and the N-type silicon carbide epitaxial layer. The P-type buried layer is located below the P-type region and used for enhancing the electric field at the boundary of the P-type region and the N-type silicon carbide epitaxial layer. According to the invention, the P-type buried layer is introduced to enhance the electric field at the boundary of the P-type region and the N-type silicon carbide epitaxial layer, and the N-type buried layer is introducedto enhance the electric field at the boundary of the N-type silicon carbide substrate and the N-type silicon carbide epitaxial layer, so that the conductivity modulation effect is enhanced, the forward conduction current of the silicon carbide PiN diode is improved, and the forward conduction performance of the silicon carbide PiN diode is improved.

The invention provides a low-voltage-drop Schottky rectifier tube which comprises an n-type substrate, a cathode metal layer is arranged below the n-type substrate, an n-type buffer layer and an n-type drift layer are sequentially stacked on the n-type substrate, a Schottky barrier metal layer and an annular first passivation layer are arranged on the n-type drift layer, and an anode metal layer is arranged on the Schottky barrier metal layer. An annular second passivation layer is arranged on the anode metal layer; a first p-type embedded layer, a plurality of second p-type embedded layers and a plurality of third p-type embedded layers which are not in contact with one another are arranged in the n-type drift layer; the Schottky barrier metal layer is internally provided with a first lower convex part connected to the first p-type embedded layer, and the Schottky barrier metal layer is internally provided with a plurality of second lower convex parts connected to the second p-type embedded layers respectively. According to the invention, a plurality of p-type embedded layers are arranged in the n-type drift layer, the forward voltage drop is reduced, and the Schottky barrier metal layer is provided with a structure which is partially arched upwards, so that the forward conduction current can be improved.