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Stacked semiconductor device and method for manufacturing same

A semiconductor and device technology, applied in the field of semiconductor devices and their manufacturing, can solve the problems of easy cracking, difficult etching and removal, and low manufacturing yield, so as to achieve the effects of reducing manufacturing cost, realizing standardization, improving yield and

Active Publication Date: 2014-04-16
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

If the wafer is too thin, the mechanical strength is low, and it is easy to crack when transferred to the carrier; if the wafer is too thick, the aspect ratio of the through hole is too large, and it is difficult to completely etch and remove it in the etching step, and then in the final Open circuits in interconnections that can occur in semiconductor devices
[0005] Therefore, in the above-mentioned conventional three-dimensional integrated semiconductor devices, there are also problems of poor device reliability, low manufacturing yield, and stress concentration near the through channel, which affects the performance of the degraded device.

Method used

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  • Stacked semiconductor device and method for manufacturing same
  • Stacked semiconductor device and method for manufacturing same
  • Stacked semiconductor device and method for manufacturing same

Examples

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no. 1 example

[0061] According to the first embodiment of the present invention, wafer assemblies are stacked in order from bottom to top.

[0062] according to Figures 1 to 3 step to provide a wafer assembly including the interconnection wafer 200 and the active wafer 100 bonded together.

[0063] Then, for example, by chemical mechanical planarization, the glass substrate 201 of the bonded wafer 200 in the wafer assembly is completely removed, thereby exposing one end of the conductive channel 203 on the surface opposite to the active wafer 100, as Figure 4 shown. In this application, the bonded wafer from which the glass substrate has been removed is referred to as a "bonded part" and denoted 200'. In this step, the semiconductor substrate 101 of the active wafer 100 and the bonding member 200' together provide mechanical strength required to withstand chemical mechanical planarization, so that the active region 103 of the active wafer 100 is not damaged.

[0064] Thereby, the lowest...

no. 2 example

[0074] According to the second embodiment of the present invention, wafers are stacked in order from top to bottom.

[0075] according to Figures 1 to 3 step to provide a wafer assembly including the interconnection wafer 200 and the active wafer 100 bonded together.

[0076] Then, for example, by chemical mechanical planarization, the semiconductor substrate 101 of the active wafer 100 in the wafer assembly is completely removed, thereby exposing one end of the conductive channel 107 on the surface opposite to the bonded wafer 200, as Figure 7 shown. In this step, the bonded wafer 200 provides the mechanical strength required to withstand chemical mechanical planarization, so that the active region 103 of the active component 100' is not damaged.

[0077] Thereby, the topmost wafer assembly is provided, and in the final semiconductor device, the glass substrate 201 on top will be removed, as Figure 10 shown.

[0078] according to Figures 1 to 3 step to provide another ...

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Abstract

A stacked semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a semiconductor substrate (101) and a plurality of layers of wafer modules located on the semiconductor substrate, wherein each layer of wafer module includes active components (100') and bonding components (200'), and the active component and the bonding component respectively comprises vertically aligned penetrating conductive passages (107, 203) with respect to each other, so that each layer of active components can be electrically connected to lower layer / upper layer of active components by way of the penetrating conductive passages.

Description

technical field [0001] The present invention relates to semiconductor devices and manufacturing methods thereof, and more particularly, to stacked semiconductor devices provided by through wafer vias (abbreviated as TWV) and a method for interconnecting semiconductor devices of different levels by using through wafer vias. Background technique [0002] An important development trend of semiconductor devices is to reduce the chip footprint of semiconductor devices. Using three-dimensional integration of semiconductor devices, that is, stacking multiple layers of semiconductor devices in the direction perpendicular to the wafer, can double the integration of devices, thereby achieving miniaturization and performance improvement of devices. [0003] Usually, through-vias are directly formed in the wafers at each level, so that stacked wafers are electrically and physically connected together using the through-vias. The manufacturing steps of the through-via include forming a t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L25/065H01L23/52H01L23/535H01L21/98H01L21/768
CPCH01L2224/80006H01L24/80H01L27/0688H01L2924/15788
Inventor 梁擎擎钟汇才赵超朱慧珑
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI