Method for manufacturing transistor

Abstract

The invention provides a method for manufacturing a transistor. The method comprises: a semiconductor substrate is provided; sacrificial layers are formed on the semiconductor substrate, wherein the sacrificial layers are formed by utilizing a deposition technology; dummy grids are formed on the sacrificial layers; source regions and drain regions are formed in portions of the semiconductor substrate, wherein the portions are at two sides of the dummy grids and the sacrificial layers; interlayer dielectric layers that are flush with the dummy grids are formed; wherein the interlayer dielectric layers covers the source regions and the drain regions; the dummy grids and the sacrificial layers are removed as well as grooves that are exposed outside the semiconductor substrate are formed in the interlayer dielectric layers; gate dielectric layers are formed at the bottom of the grooves; high K dielectric layers are formed at sidewalls and the bottoms of the grooves; and metal grids are formed on the high K dielectric layers, wherein the grooves are filled with the metal grids and are flush with the interlayer dielectric layers. According to the invention, a leakage current problem of a transistor can be solved as well as the performance of the transistor can be improved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for manufacturing transistors. Background technique [0002] As the feature size of integrated circuits shrinks to the deep submicron field, the gate size of transistors shrinks, and the thickness of the silicon dioxide layer as the gate dielectric layer also needs to be reduced accordingly to increase the gate capacitance of transistors and prevent devices from appearing. short channel effect. However, when the thickness of the gate dielectric layer is gradually reduced, and the thickness of the gate dielectric layer is reduced to less than 3 nanometers, many problems will arise, such as: (1) leakage current increases; (2) impurity diffusion, that is, the gate dielectric layer and the semiconductor substrate There is an impurity concentration gradient between them, and the impurity will diffuse from the gate into the semiconductor substrate or be fixed in the ga...

AI Technical Summary

Problems solved by technology

[0011] In practice, it is found that the transistors made by the existing method have leakage current, and the performance of the device is unstable

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