Photosensitive resin composition for resist material, and photosensitive resin laminate

A technology of photosensitive resin layer and photosensitive resin, applied in the field of photosensitive resin composition and photosensitive resin laminate, photosensitive resin laminate, achieving high resolution, excellent developability, and suppression of bump loss Effect

Active Publication Date: 2012-07-04
ASAHI KASEI KK
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

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Method used

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  • Photosensitive resin composition for resist material, and photosensitive resin laminate
  • Photosensitive resin composition for resist material, and photosensitive resin laminate
  • Photosensitive resin composition for resist material, and photosensitive resin laminate

Examples

Experimental program
Comparison scheme
Effect test

Example

[0135] (Examples 1 to 20 and Comparative Examples 1 to 2)

[0136] First, the methods for preparing evaluation samples of the examples and comparative examples are described, and then, the evaluation methods of the obtained samples and the evaluation results thereof are shown.

[0137] 1. Preparation of evaluation samples

[0138] The samples for evaluation in the examples and comparative examples were prepared as follows.

[0139]

[0140] The photosensitive resin composition of the composition shown in the following Table 1 (wherein, the number of each component indicates the compounding amount (parts by mass) of the solid content) and the solvent were thoroughly stirred and mixed to prepare a photosensitive resin composition The solution was uniformly applied to the surface of a 16 μm thick polyethylene terephthalate film as a support using a bar coater, and dried in a dryer at 95°C for 12 minutes to form a photosensitive resin layer. The thickness of the photosensitive resin laye...

Example

[0171] (Examples 21 and 22)

[0172] 1. Production of semiconductor bumps

[0173]

[0174] In the production of copper pillars or solder bumps, the following copper sputtering silicon wafer is used: A chrome layer of 2000 angstroms thick is formed on a 5-inch silicon wafer with a sputtering device made by Amalba, and a copper layer of 2000 angstroms is further formed .

[0175]

[0176] While peeling off the polyethylene film of the photosensitive resin laminate, it was laminated with a hot roll laminator (manufactured by Dasei Lamiyata Co., Ltd., VA-400III) at a roll temperature of 80°C until it was preheated to On a silicon wafer at 80°C. The air pressure is 0.20 MPa, and the lamination speed is 1.0 m / min.

[0177]

[0178] Using a glass chromium mask, exposure was carried out by ghi-rays manufactured by Certratec Co., Ltd. (trade name). The illuminance measured on the substrate surface is 2500mW / cm 2 .

[0179]

[0180] Use 30℃, 1wt% K 2 CO 3 The aqueous solution was developed u...

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Abstract

Disclosed is a photosensitive resin composition for a resist material, which contains (A) 30-70% by mass of an alkali-soluble polymer, (B) 20-60% by mass of a compound that has an ethylenically unsaturated double bond, and (C) 0.1-20% by mass of a photopolymerization initiator. The photosensitive resin composition contains, as (B) the compound that has an ethylenically unsaturated double bond, (B-1) a compound that has at least a hydroxyl group, a phenyl group and two or more ethylenically unsaturated double bonds in each molecule, and (B-2) a compound that has an ethylene oxide group and a (meth)acryloyl group in each molecule.

Description

Technical field [0001] The present invention relates to a photosensitive resin composition and a photosensitive resin laminate, and in particular to a photosensitive resin combination preferable as a resist for bump formation of LSI chips or CSP (Chip Size Package) And photosensitive resin laminate. Background technique [0002] The bump refers to a small convex conductor protrusion provided for easy connection when connecting a component terminal and a circuit board. The case where the LSI chip is directly bonded to the mounted substrate is called bare chip mounting. In this case, bumps are formed on the terminals of the LSI chip. In addition, when connecting a package in which the LSI chip is temporarily sealed with an organic resin or the like to the mounted substrate, bumps are formed on the terminals of the package. [0003] A CSP is a component that packages an LSI chip, and generally refers to a package that is the same size as or slightly larger than the LSI chip, and is ...

Claims

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Application Information

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IPC IPC(8): G03F7/027G03F7/004H01L21/027
CPCG03F7/027G03F7/40
Inventor 筒井大和
Owner ASAHI KASEI KK
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