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Bytecode branch processor and method

一种字节码、处理器的技术,应用在电数字数据处理、仪器、机器执行装置等方向,能够解决性能恶化、分支误预测、大量硬件资源等问题,达到性能改善、防止分支误预测的效果

Inactive Publication Date: 2012-07-11
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The direct thread approach has the disadvantage that the branch instruction, being an indirect branch instruction, confuses the branch predictor of a real processor (e.g., x86 or ARM), leading to a large number of branch mispredictions and performance degradation
In order to solve such disadvantages, various methods including selective inlining and associated threading technology (context threading) were introduced, but caused disadvantages of code size increase and call / return overhead
[0010] Also, hardware implementations such as Jazelle DBX (some less frequently used instructions are implemented as software processors) are high performance, but require a lot of hardware resources, and cannot handle new types of bytecodes (e.g., Dalvik)

Method used

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Examples

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Embodiment Construction

[0044]The following description is provided to assist the reader in gaining an overall understanding of the methods, devices and / or systems described herein. Accordingly, various changes, modifications and equivalents of the methods, devices and / or systems described herein will be suggested to those of ordinary skill in the art. Also, descriptions of known functions and constructions may be omitted for increased clarity and conciseness.

[0045] figure 1 An example of a virtual machine bytecode and a direct thread handler is shown.

[0046] The handler shown in the example is used to facilitate efficient processing of branches by the processor when the handler is implemented as an interpreter in a virtual machine (eg, a Java or Android Dalvik virtual machine).

[0047] exist figure 1 In the example shown, Dalvik bytecode with variable length is provided. A bytecode with a fixed length (for example, Java) can be applied, but since variable-length processing is more complica...

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PUM

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Abstract

A bytecode interpreter in a computing system is provided. The interpreter assists in branch prediction by a host processor that processes a virtual machine such as JAVA TM and DALVIK TM , thereby reducing branch misprediction and achieving high performance.

Description

[0001] This application claims the benefit of Korean Patent Application No. 10-2010-0125688 filed with the Korean Intellectual Property Office on December 9, 2010, the entire disclosure of which is hereby incorporated by reference for all purposes. technical field [0002] The following description relates to a bytecode interpreter (interpreter) in a computing system, and more specifically, relates to a method for effectively removing branch mispredictions or Pipeline stall penalties, branch handlers and methods to improve bytecode interpreter performance. Background technique [0003] A lot of research has been done to improve the performance of virtual machines to process Java bytecode. In particular, the performance of the virtual machine is significantly enhanced by just-in-time compilation (JITC, Just-in-time compilation). [0004] However, it is difficult for embedded systems to effectively introduce JITC because of resource constraints and user-sensitive latencies, s...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/38
CPCG06F9/3806G06F9/3844G06F9/45508G06F9/322G06F9/3842
Inventor 辛圭桓曹承模
Owner SAMSUNG ELECTRONICS CO LTD
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