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Field programmable gate array (FPGA) implementation method applied to wireless sensor network to realize symbol precise timing

A wireless sensor network and precise timing technology, applied in the direction of multi-frequency code system, etc., can solve the problems of timing decision function deformation, large timing error, difficult to obtain timing results, etc., to optimize system resource consumption, optimize resource consumption, save The effect of resource depletion

Inactive Publication Date: 2014-04-23
SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI +1
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Problems solved by technology

[0003] Timing synchronization algorithms are usually divided into synchronization algorithms based on non-assisted data and synchronization algorithms based on auxiliary data. Currently, the most widely used pilot-based timing and frequency offset estimation algorithm is proposed by Schmidl. This algorithm uses the same two stages The training sequence is used for timing. This method uses a recursive formula for calculation, and the implementation complexity is very low. It is widely used in OFDM systems. However, there is an error platform in the timing decision function of this method, which will cause a large timing deviation.
In order to reduce the influence caused by the error platform of the timing decision function, Minn made certain improvements to Schmidl's method. Minn's timing decision function is a peak, which eliminates the influence of the error platform to a certain extent. Park proposed a The timing decision function has a sharper waveform, but due to the existence of the cyclic prefix, the decision function of this method has a large side lobe. When the cyclic prefix is ​​long, it is almost the same as the height of the main lobe. When the signal-to-noise ratio is low situation, it is difficult to get correct timing results
The cross-correlation between the training sequence and the local PN code has an obvious single peak, but in the case of a large frequency offset, the timing decision function will be seriously deformed, causing a large timing error

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  • Field programmable gate array (FPGA) implementation method applied to wireless sensor network to realize symbol precise timing
  • Field programmable gate array (FPGA) implementation method applied to wireless sensor network to realize symbol precise timing
  • Field programmable gate array (FPGA) implementation method applied to wireless sensor network to realize symbol precise timing

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Embodiment Construction

[0018] Below in conjunction with specific embodiment, further illustrate the present invention. It should be understood that these examples are only used to illustrate the present invention and are not intended to limit the scope of the present invention. In addition, it should be understood that after reading the teachings of the present invention, those skilled in the art can make various changes or modifications to the present invention, and these equivalent forms also fall within the scope defined by the appended claims of the present application.

[0019] Embodiments of the present invention relate to a kind of FPGA implementation method applied to the precise timing of symbols in wireless sensor networks, comprising the following steps:

[0020] (1) Local correlation operation: perform secondary quantization on the local sequence, and a complex multiplier is needed in the realization of the local correlator. The complex multiplication algorithm used in this embodiment is...

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Abstract

The invention relates to a field programmable gate array (FPGA) implementation method applied to a wireless sensor network to realize symbol precise timing. The FPGA implementation method comprises the following steps: performing secondary quantization on a local sequence; performing a mutual correlation operation on a receipt signal and the local sequence to obtain a mutual correlation value; calculating a power value in the manner of sliding window; performing approximate treatment on the obtained mutual correlation value, and working out a module value of the mutual correlation value; performing threshold value judgment after the module value of the mutual correlation value and the power value are obtained; multiplying the obtained power value by a preset threshold value; accessing the multiplied power value and preset threshold value and the module value of the mutual correlation value to a comparator; when the module value of the mutual correlation value is greater than the multiplied power value and preset threshold value, indicating that precise capturing is successful; and finding out the position of a fast Fourier transform (FFT) window through a counting mode to complete timing synchronism. According to the FPGA implementation method, the symbol precise timing is realized in wireless sensor network applications at lower resource consumption.

Description

technical field [0001] The invention relates to the field of wireless communication, in particular to an FPGA implementation method for precise symbol timing applied in a wireless sensor network OFDM system. Background technique [0002] Wireless Sensor Network (Wireless Sensor Network, referred to as "WSN") is an "intelligent" network composed of micro-sensor nodes with wireless communication, perception and computing capabilities. Widely used in various fields such as military, agriculture, environmental detection, medical and health care, industry, intelligent transportation, etc. Orthogonal Frequency Division Multiplexing ("OFDM") technology is one of the core technologies in wireless sensor networks. It can be regarded as a modulation technique and a multiplexing technique. With the advantages of high spectrum utilization and strong anti-multipath fading ability, it has become a popular technology in modern wireless communication and is widely used in the field of high...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L27/26
Inventor 丁承罗炬锋汪磊付耀先
Owner SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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