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Multilayer film structure for preparing polycrystalline silicon thin film

A technology of polycrystalline silicon thin film and amorphous silicon thin film, which is applied in the direction of transistors, layered products, metal layered products, etc., can solve the problems of long annealing time, alignment error, high content of polycrystalline silicon and nickel, and achieve the goal of shortening the crystallization transition time Effect

Inactive Publication Date: 2012-07-25
GUANGDONG SINODISPLAY TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The above method can solve the problem of alignment error of each mask caused by the shrinkage of the glass substrate, but the random distribution of crystal nuclei not only results in long annealing time (which is unacceptable for large-area glass substrates), but also Residual nickel content in polysilicon is still high

Method used

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  • Multilayer film structure for preparing polycrystalline silicon thin film
  • Multilayer film structure for preparing polycrystalline silicon thin film
  • Multilayer film structure for preparing polycrystalline silicon thin film

Examples

Experimental program
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Effect test

example 1

[0030] 1) Refer to figure 1 , first use ionized chemical vapor deposition (PEVCD) to deposit 300nm silicon oxide on the glass substrate of Eagle 2000, and then use low pressure chemical deposition (LPCVD) to deposit a layer of amorphous silicon with a thickness of 50nm at 550°C;

[0031] 2) A silicon dioxide layer with a thickness of about 4 nm is formed on the surface of amorphous silicon, which is then photoetched into uniformly distributed lines with a width of 1.5 μm and a pitch of 30 μm (such as figure 1 CNL in), the length of line is equal to the width of substrate; The solution used is 777, the corrosion time is 1 minute) the mixed solution H 2 SO 4 and H 2 o 2 remove;

[0032] 3) sputtering a nickel layer with a thickness of approximately 5 nm onto the exposed surfaces, i.e. silicon dioxide and wires;

[0033] 4) Then anneal at 590°C for 1 hour, since the crystallization process starts from the amorphous silicon below the uniform distribution line, so figure 1 S...

example 2~5

[0037] According to the method of Example 1, Examples 2-5 were prepared, except that the experimental conditions listed in Table 1 below were different, and the rest were the same.

[0038] Table 1

[0039] example

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Abstract

The invention provides a multilayer film structure for preparing a polycrystalline silicon thin film. The multilayer film structure comprises an insulation substrate, a blocking layer, a noncrystalline silicon thin film layer, an oxide layer and metal inducing layers, wherein the blocking layer and the noncrystalline silicon thin film layer are positioned on the insulation substrate; the oxide layer is positioned on the noncrystalline silicon thin film layer, and grooves with equal intervals and dimensions are photoetched on the oxide layer; the metal inducing layers are positioned on the surfaces of the oxide layer and the grooves; and the noncrystalline silicon thin film is completely converted into a continuous strip-shaped domain polycrystalline silicon through annealing treatment. By utilizing the multilayer film structure provided by the invention, the strip-shaped continuous domain polycrystalline silicon thin film can be obtained in a short annealing time, thus the whole polycrystalline silicon thin film can become an active layer of a thin film transistor.

Description

technical field [0001] The invention relates to the field of polysilicon thin films used for displays, in particular to a multi-layer film structure for preparing polysilicon thin films. Background technique [0002] Because low-temperature amorphous silicon thin film crystallization can fabricate large-area electronic devices on cheap glass with high mobility, it has attracted widespread attention. Metal-induced unidirectional crystallization (MIUC) polysilicon thin-film transistors (TFTs) have high carrier mobility and good device uniformity, so they can be used to realize active matrices for flat panel displays and image sensors. [0003] However, MIUC-TFTs suffer from mask misalignment, which is caused by the shrinkage of the glass substrate during crystallization. In addition, the residual nickel in the polysilicon channel will affect the long-term stability of the TFT. [0004] There are several ways to reduce the nickel content, for example, silicon nitride (SiNx) c...

Claims

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Application Information

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IPC IPC(8): H01L29/06H01L29/786H01L21/02B32B9/04B32B17/00B32B15/00
Inventor 赵淑云郭海成凌代年邱成峰彭华军黄飚
Owner GUANGDONG SINODISPLAY TECH