Unlock instant, AI-driven research and patent intelligence for your innovation.

Method for preparing multi-layer-film structure with polycrystalline silicon thin film

A polysilicon thin film and amorphous silicon thin film technology, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of long annealing time, high polysilicon nickel content, alignment error, etc., and achieve the effect of reducing the content

Inactive Publication Date: 2012-07-25
GUANGDONG SINODISPLAY TECH
View PDF3 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The above method can solve the problem of alignment error of each mask caused by the shrinkage of the glass substrate, but the random distribution of crystal nuclei not only results in long annealing time (which is unacceptable for large-area glass substrates), but also Residual nickel content in polysilicon is still high

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method for preparing multi-layer-film structure with polycrystalline silicon thin film
  • Method for preparing multi-layer-film structure with polycrystalline silicon thin film
  • Method for preparing multi-layer-film structure with polycrystalline silicon thin film

Examples

Experimental program
Comparison scheme
Effect test

example 1

[0027] 1) Refer to figure 1 , first use ionized chemical vapor deposition (PEVCD) to deposit 300nm silicon oxide on the glass substrate of Eagle 2000, and then use low pressure chemical deposition (LPCVD) to deposit a layer of amorphous silicon with a thickness of 50nm at 550°C;

[0028] 2) A silicon dioxide layer with a thickness of about 4 nm is formed on the surface of amorphous silicon, which is then photoetched into uniformly distributed lines with a width of 1.5 μm and a pitch of 30 μm (such as figure 1 CNL in), the length of line is equal to the width of substrate; The solution used is 777, the corrosion time is 1 minute) the mixed solution H 2 SO 4 and H 2 o 2 remove;

[0029] 3) sputtering a nickel layer with a thickness of approximately 5 nm onto the exposed surfaces, i.e. silicon dioxide and wires;

[0030] 4) Then anneal at 590°C for 1 hour, since the crystallization process starts from the amorphous silicon below the uniform distribution line, so figure 1 S...

example 2~5

[0034] According to the method of Example 1, Examples 2-5 were prepared, except that the experimental conditions listed in Table 1 below were different, and the rest were the same.

[0035] Table 1

[0036] example

[0037] It should be understood that the above examples are for illustrative purposes only, and in other embodiments of the present invention, the crystallization nuclei (that is, grooves) may also be arranged in other forms with the same spacing and equal size. Since the metal-induced polysilicon film with band-like continuous crystal domains can be obtained through the completely equal-width crystallization nuclear line defined in advance on the silicon oxide layer, after crystallization, the entire polysilicon film can be made into a high-performance thin film transistor. source layer, so the problem of mask misalignment caused by shrinkage of the glass substrate is resolved.

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

PropertyMeasurementUnit
Spacingaaaaaaaaaa
Widthaaaaaaaaaa
Widthaaaaaaaaaa
Login to View More

Abstract

The invention provides a method for preparing a multi-layer-film structure with polycrystalline silicon thin film. The method comprises the following steps: 1) forming a blocking layer on an insulating substrate and depositing an amorphous silicon thin film layer on the blocking layer; 2) forming an oxidization layer on the amorphous silicon thin film, and conducting photoetching on the oxidization layer so as to form grooves with the same intervals and the same sizes; 3) covering metal induced layers on the surface of the oxidization layer and the surface of the grooves; and 4) annealing so as to crystallize the amorphous silicon thin film completely. By the adoption of the method in the invention, the residual amount of nickel in the polycrystalline silicon can be reduced, and the annealing time for the complete crystallization can be shortened.

Description

technical field [0001] The present invention relates to polycrystalline silicon thin films for displays, and more particularly, the present invention relates to a method for preparing a multilayer film structure having polycrystalline silicon thin films. Background technique [0002] Because low-temperature amorphous silicon thin film crystallization can fabricate large-area electronic devices on cheap glass with high mobility, it has attracted widespread attention. Metal-induced unidirectional crystallization (MIUC) polysilicon thin-film transistors (TFTs) have high carrier mobility and good device uniformity, so they can be used to realize active matrices for flat panel displays and image sensors. [0003] However, MIUC-TFTs suffer from mask misalignment, which is caused by the shrinkage of the glass substrate during crystallization. In addition, the residual nickel in the polysilicon channel will affect the long-term stability of the TFT. [0004] There are several ways...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L21/20H01L21/02H01L21/336
Inventor 赵淑云郭海成凌代年邱成峰彭华军黄飚
Owner GUANGDONG SINODISPLAY TECH