PoE port overvoltage comprehensive protection circuit and method for realizing same

Abstract

The invention discloses a Power over Ethernet (PoE) port overvoltage comprehensive protection circuit and a method for realizing the circuit. The PoE port overvoltage comprehensive protection circuit comprises two-stage protection circuits, wherein the first-stage protection circuit adopts a triode gas discharge tube and is used for discharging lightning stroke current to the ground; the second-stage protection circuit adopts a clamp type overvoltage protection device and is used for carrying out first-stage residual voltage and electrostatic protection; a resistor and common-mode inductor combination circuit is adopted between the first-stage protection circuit and the second-stage protection circuit and is used for coordinating performance characteristics among the two-stage protection circuits and the device so as to achieve the effect of decoupling between the first-stage protection circuit and the second-stage protection circuit. Owing to the PoE port overvoltage comprehensive protection circuit, the balance of protection circuits can be enhanced and the amplitude and energy for conversion from common-mode overvoltage to differential-mode overvoltage can be reduced so as to improve the protection effect.

Description

technical field [0001] The invention relates to Ethernet technology, in particular to a power over Ethernet (PoE, Power Over Ethernet) port overvoltage comprehensive protection circuit and a realization method thereof. Background technique [0002] With the construction of 3G network, Power over Ethernet (PoE) technology has been greatly developed. This technology can provide data for various devices that use Ethernet to communicate, such as wireless access points (AP, Access Point), cameras, etc. Communication and power supply greatly simplify the cost of laying lines, making this technology widely used. But what follows is that the protection of PoE power supply ports has become increasingly prominent. PoE ports provide both data communication and power transmission, which determines the particularity of its protection. It is necessary to take into account the protection of data circuits and PoE circuits. [0003] The current protection scheme for PoE ports is subject t...

AI Technical Summary

Problems solved by technology

[0004] 1) The symmetry between the common mode protection stages is insufficient. When subjected to a large surge current impact, a large differential mode voltage will be generated, which will increase the burden on the protection circuit of the subsequent stage, and even fail to play a protective role. The details are as follows:

[0005] The varistor is limited by its own process characteristics, and the accuracy of the DC breakdown voltage cannot be very high. Compared with the rated value, there is generally a deviation within ±10%. Then the maximum deviation of the operating voltage of the two varistors can reach 20% of the rated value, when subjected to common-mode surge overvoltage, the two varistors will generate excessively high differential-mode overvoltage due to the inconsistency of the operating voltage, that is, the common-mode overvoltage is transformed into a differential-mode overvoltage. Voltage. No matter for data communication circuit or PoE power supply circuit, differential mode overvoltage is very harmful. The main discussion is as follows: For data communication circuit, the high frequency transformer on the data line can isolate common mode overvoltage, but cannot isolate differential mode Mode overvoltage, differential mode overvoltage is applied to the pins of the subsequent communication chip through the transformer, and the communication chip has a weak tolerance to differential mode overvoltage due to the process characteristics, which can easily cause the function loss or performance of the chip. Reduce; for the PoE power supply circuit, the differential mode overvoltage will also be applied to various signal pins and power pins of the PoE control chip, such as the 48V positive and negative poles of the chip, MOSFET drive signals, and detection of powered devices (PDs). Signals, current detection signals, etc. These chip pins are CMOS circuits, which have a weak ability to withstand overvoltage, and differential mode overvoltage can easily cause failure or performance degradation of these signal pins and power pins; if the first level uses a second-level gas discharge tube, due to the technical characteristics of the gas discharge tube, the error of its operating voltage is ±20%, and the error of the operating voltage of the two gas discharge tubes can reach 40%, which will cause a serious difference in the surge overvoltage of the positive and negative lines of the power supply to the ground. Balanced, this will produce excessively high differential mode overvoltage, same as the previous analysis, this differential mode overvoltage can easily cause damage to the subsequent stage circuit

[0006] 2) The use of

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