Shift register circuit and chip

Abstract

The embodiment of the invention discloses a shift register circuit and a chip. The circuit comprises a resistance changing memristor matrix and a current sensitive module, wherein positive phase input ends of the same column of resistance changing memristors in the resistance changing memristor matrix are connected, so that the positive phase input ends of the same column of resistance changing memristors are served as signal input ports; negative phase input ends of the same column of resistance changing memristors in the resistance changing memristor matrix are connected with the input end of the current sensitive module, so that the output end of the current sensitive module is served as a signal output port; the input end of the current sensitive module is connected to low electric level during operation; when the current received by the input end of the current sensitive module is more than threshold current, the output end of the current sensitive module outputs high electric level; and when the current received by the input end of the current sensitive module is less than the threshold current, the output end of the current sensitive module outputs low electric level. In the embodiment of the invention, the occupied area of the shift register circuit is saved and the programmable performance of the shift register circuit is achieved.

Description

technical field [0001] The invention relates to the field of electronic technology, in particular to a shift register circuit and a chip. Background technique [0002] Shift register circuits are usually based on metal-oxide-semiconductor (MOS, Metal-Oxide-Semiconductor) tube storage devices. As the requirements for chip integration become higher and higher, the size of shift register circuits is also decreasing, but Due to the limitation of the size of the MOS transistor storage device itself, the shift register circuit in the prior art has a technology node with the smallest size. Contents of the invention [0003] Embodiments of the present invention provide a shift register circuit and a chip, which are used to solve the problem that the shift register circuit in the prior art has a minimum size technology node. [0004] In order to solve the above problems, the embodiment of the present invention discloses the following technical solutions: [0005] On the one hand,...

AI Technical Summary

Problems solved by technology

[0002] Shift register circuits are usually based on metal-oxide-semiconductor (MOS, Metal-Oxide-Semiconductor) tube storage devices. As the requirements for chip integration become higher and higher, the size of shift register circuits is also decreasing, but Due to the limitation of the size of the MOS tube storage device itself, the shift register circuit in the prior art has the technology node of the smallest size

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