Finned-type field-effect transistor structure and finned-type field-effect transistor forming method
A fin field effect transistor and sub-fin technology, which is applied in the direction of electrical components, circuits, semiconductor devices, etc., can solve device performance problems and other problems, and achieve the effects of improving performance, increasing length, and avoiding short channel effects
Active Publication Date: 2015-03-11
SEMICON MFG INT (SHANGHAI) CORP
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Problems solved by technology
[0004] However, as the process node is further reduced, there are problems with the device performance of the prior art FinFET
Method used
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[0051] As mentioned in the background art, as the process node decreases, the device performance of the fin field effect transistor in the prior art becomes worse.
[0052] After research, the inventors of the embodiments of the present invention have found that the performance of the FinFET is at least related to the following two factors: one is the length of the channel region of the FinFET, and the FinFET in the prior art The length of the channel region becomes shorter, which easily causes the short channel effect, which makes the performance of the FinFET device worse; one is that the parasitic capacitance of the FinFET increases, which makes the device of the FinFET performance deteriorates.
[0053] After further research, the inventor of the embodiment of the present invention provides a structure of a fin field effect transistor, including:
[0054] base;
[0055]A fin located on the surface of the base, the fin includes two first sub-fins located on the base surfa...
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Abstract
An embodiment of the invention provides a finned-type field-effect transistor forming method. The finned-type field-effect transistor forming method includes: sequentially forming a silicon thin film, a hard mask layer, a pattern layer with a first opening and a sidewall covering the first opening on the surface of a substrate; etching the hard mask layer and the silicon thin film by utilizing the sidewall as a mask so as to form a second opening which is exposed on the surface of the substrate; forming a sacrificial layer with the surface at least flushing with the surface of the silicon thin film in the second opening; removing the pattern layer to form two sub-fin portions corresponding to the sidewall; removing the hard mask layer to form an insulation layer flushing with the first sub-fin portion; forming a second sub-fin portion which is arranged at the top of the first sub-fin portions and connecting the two sub-fin portions; removing the insulation layer and the sacrificial layer to form a cavity among the substrate, the second sub-fin portion and the two sub-fin portions. The finned-type field-effect transistor structure in the embodiment is good in device performance.
Description
technical field [0001] The invention relates to the technical field of semiconductors, in particular to a structure and a forming method of a fin field effect transistor. Background technique [0002] With the continuous development of semiconductor process technology and the gradual reduction of process nodes, gate-last (gate-last) process has been widely used to obtain an ideal threshold voltage and improve device performance. However, when the feature size (CD, Critical Dimension) of the device is further reduced, even if the gate-last process is adopted, the structure of the conventional MOS field effect transistor can no longer meet the requirements for device performance, and the multi-gate device has been obtained as a substitute for the conventional device. Widespread concern. [0003] Fin Field Effect Transistor (Fin FET) is a common multi-gate device, figure 1 A schematic diagram of a three-dimensional structure of a fin field effect transistor in the prior art i...
Claims
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IPC IPC(8): H01L29/78H01L29/06H01L21/336
Inventor 三重野文健
Owner SEMICON MFG INT (SHANGHAI) CORP