Single-chip package part with wafer thinned after bottom fillers cures and manufacture process thereof
A single-chip and package technology, which is applied in semiconductor/solid-state device manufacturing, electrical solid-state devices, semiconductor/solid-state device components, etc., can solve problems such as easy warpage and unguaranteed packaging reliability, and improve reliability performance, reduced possibility of wafer warpage, and thinner dimensions
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[0023] The present invention will be further described below in conjunction with the accompanying drawings.
[0024] As shown in the figure, a single-chip package in which the wafer is thinned after the underfill is cured is mainly composed of a substrate 1, a nickel-gold pad 2, a chip 4, a tin-silver bump 5, an underfill 6 and a solder ball 9; The nickel-gold pad 2 is fixedly connected to the substrate 1, and the tin-silver bump 5 is fixedly connected to the chip 4; the tin-silver bump 5 coincides with the center line of the nickel-gold pad 2 and is connected by welding; The filler 6 fills the gap between the substrate 1 and the chip 4 , and surrounds the nickel-gold pad 2 and the tin-silver bump 5 ;
[0025] The chip 4 constitutes a circuit power supply and signal channel through tin-silver bumps 5 , nickel-gold pads 2 , substrate 1 and tin balls 9 .
[0026] As shown in the figure, a manufacturing process of a single-chip package in which the wafer is thinned after the und...
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