Parallel self-test device for data link layer and method of parallel self-test device

A technology of data link layer and self-test, which is applied in the field of communication transmission, can solve the problems that the built-in BIST cannot be directly used, and the BIST functions are not compatible with each other, so as to overcome the incompatibility of BIST functions, shorten the test time, and have strong practicability Effect

Active Publication Date: 2013-05-22
NAT UNIV OF DEFENSE TECH
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Problems solved by technology

In particular, if the transmitter and receiver use transceivers from different manufacturers, their BIST functions are usually not compatible with each other, which will make it impossible to directly use the built-in BIST function

Method used

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  • Parallel self-test device for data link layer and method of parallel self-test device
  • Parallel self-test device for data link layer and method of parallel self-test device
  • Parallel self-test device for data link layer and method of parallel self-test device

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Embodiment Construction

[0059] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0060] Such as Figure 4 As shown, it is a schematic diagram of the structure of the data link layer with the BIST test function added after the application of the present invention.

[0061] The BIST enable module (ie: BIST enable bit) is used to control whether to start the link layer BIST test. Testers can set this bit through bus commands (such as I2C, SMbus) and configuration registers (such as EEPROM, FLASH). If it is set to be valid, it means to start the link BIST test. If it is invalid, it means to stop the link BIST test.

[0062] The link state module is used to represent and output the state of the current physical layer. When the physical layer is powered on and ready to serve the data link layer, a status indication signal will be given; if the link status is valid, it means that the physical layer is ready, and the da...

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Abstract

The invention discloses a parallel self-test device for a data link layer and a method of the parallel self-test device. The device comprises a BIST (build-in self-test) enabling module, a link state module, a control module, a BIST controller, a BIST start / stop message generator, a BIST test mode generator, a BIST sequence message wrapper, a BIST sequence message wrapping remover, a BIST start / stop message detector and a BIST output response analyzer. The method adopts the device for parallel self-test, and includes the steps: (1) starting a test process; (2) receiving and analyzing a test result through the BIST output response analyzer; and (3) stopping the test process. The device and the method are simple in principle, easy to implement, good in compatibility and high in practicality, can test multiple bound channels without depending on high-level software, and overcome the problem that BIST functions of transceivers of different manufactures are incompatible with one another.

Description

technical field [0001] The invention mainly relates to the field of communication transmission, in particular to a parallel self-test device and method for data link layer. Background technique [0002] At present, various high-speed data communication protocols are based on layered message transmission protocols. Interconnect communication protocols such as: QuickPath Interface, HyperTransport, PCI-Express, and Infiniband are all examples based on this technology. A typical transmission protocol consists of software layer, processing layer, data link layer (referred to as link layer) and physical layer from top to bottom. Each layer includes a sender and a receiver, and each layer is relatively independent. , easy to reuse or upgrade. In the physical layer of the communication protocol, the point-to-point high-speed serial communication technology is widely used in the interconnection between chips or processors in the system. The communication link used usually includes ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L12/26
Inventor 王永庆徐炜遐王克非刘路肖灿文沈胜宇戴艺庞征斌张磊曹继军张鹤颖高蕾伍楠
Owner NAT UNIV OF DEFENSE TECH
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