Unlock instant, AI-driven research and patent intelligence for your innovation.

A semiconductor device for high-voltage integrated circuits and its manufacturing method

A high-voltage integrated circuit and semiconductor technology, applied in the direction of semiconductor/solid-state device manufacturing, circuits, electrical components, etc., can solve the problems of complex process and high manufacturing cost, and achieve the goal of reducing manufacturing cost, ensuring performance, reducing manufacturing cost and traditional technology. Effects of complex operations

Active Publication Date: 2016-04-06
FOUNDER MICROELECTRONICS INT
View PDF6 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] This traditional manufacturing method requires two lithography (low-voltage P-field lithography, high-voltage P-field lithography) and three ion implantations including: low-voltage PF implantation, APT implantation, and high-voltage PF implantation to complete the P-field in high-voltage integrated circuits. Doping, the process is more complicated, and the manufacturing cost is relatively high

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A semiconductor device for high-voltage integrated circuits and its manufacturing method
  • A semiconductor device for high-voltage integrated circuits and its manufacturing method
  • A semiconductor device for high-voltage integrated circuits and its manufacturing method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0030] The embodiments of the present invention will be further described in detail below in conjunction with the accompanying drawings.

[0031] An embodiment of the present invention provides a semiconductor device for a high-voltage integrated circuit, including:

[0032] A P-well region located in the substrate, the P-well region includes a low-voltage P-well region and a high-voltage P-well region;

[0033] A local thick oxide layer located on the upper surface of the P well region;

[0034] The P-type doped region located in the P-well region, the P-type doped region is exposed through a mask, and the P-field implantation is performed into the upper surface of the field region of the low-voltage P-well region and the high-voltage P-well region, and performing anti-puncture implantation in the active region of the low-voltage P-well region;

[0035] a gate oxide layer located on the active region of the P well region;

[0036] a polysilicon gate located on the upper su...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to the technical field of semiconductors, in particular to a semiconductor device for a high-voltage integrated circuit. The semiconductor device for the high-voltage integrated circuit comprises a P well region, a partial thick oxide layer, a P type doped region, a gate oxide layer, a polysilicon gate, a medium layer, contacting holes and metal layers. The P well region is located in a substrate. The P well region comprises a low-voltage P well region and a high-voltage P well region. The partial thick oxide layer is located on the upper surface of the P well region. The P type doped region is located in the P well region. The P type doped region injects P fields into the upper surface of the low-voltage P well region and the high-voltage P well region through a one-time mask exposure and conducts prevention through injection to an active region of the P well region. The gate oxide layer is located on the active region of the P well region. The polysilicon gate is located on the upper surface of the gate oxide layer. The medium layer and the contacting holes are located on the achieve region and the polysilicon gate. The metal layers are located on the upper surface of the medium layer and in the contacting holes. The semiconductor device for the high-voltage integrated circuit and preparation method of the semiconductor device have the advantages of reducing cost, simplifying complex operational procedures in the prior art and achieving the effect of ensuring performances of the semiconductor device and the integrated circuit.

Description

technical field [0001] The invention relates to the technical field of manufacturing semiconductor integrated circuits, in particular to a semiconductor device for high-voltage integrated circuits and a manufacturing method thereof. Background technique [0002] At present, the local oxidation (LOCOS) isolation process is generally used in the micron and submicron integrated circuit manufacturing processes. Since the solid solubility of boron ions in silicon is less than that in silicon dioxide, the In the process of local oxidation to form a thick oxide layer (these thick oxide layers are generally called field oxide layers, or Fox), boron ions on the silicon surface segregate into the thick oxide layer (ie, silicon dioxide), resulting in The concentration of boron ions decreases. [0003] N well and P well are necessary structures for making CMOS integrated circuits, and the dopant substances in them are phosphorus ions and boron ions respectively. When the field oxide l...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/092H01L21/265H01L21/8238
Inventor 潘光燃
Owner FOUNDER MICROELECTRONICS INT