Silicon substrate radial homojunction heterojunction solar battery and manufacturing method thereof
A solar cell and heterojunction technology, which is applied in circuits, photovoltaic power generation, electrical components, etc., can solve the problems of affecting the interface state density, reducing the interface state density, and interface state density sensitivity, so as to improve performance and reduce costs Effect
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Embodiment 1
[0036] The battery structure includes, as figure 1 As shown, the silicon substrate 104 is P-type single crystal silicon (P-c-Si); the inner layer 101 of each silicon line is P-type single crystal silicon (P-c-Si), and the middle layer 102 is N-type doped single crystal silicon (N-c-Si), the shell layer 103 is an N+ type amorphous silicon film (N + -a-Si); the front of the silicon substrate 104 forms a submicron or micron silicon line array; the back of the silicon substrate 104 is, from top to bottom, an intrinsic I-type amorphous silicon film 105 (I-a-Si) and a P+ type Amorphous silicon film 106 (P + -a-Si), constituting the HIT structure. The front side of the P-type crystalline silicon wafer is a submicron or micron silicon line array, PN homogeneous NN+ heterojunction structure, the homojunction is the radial homojunction of crystalline silicon, and the heterojunction is the radial heterojunction of crystalline silicon / amorphous silicon Mass junction; the back of the si...
Embodiment 2
[0045] The battery structure includes, as figure 1 As shown, the silicon substrate 104 is P-type single crystal silicon (P-c-Si); the inner layer 101 of each silicon line is P-type single crystal silicon (P-c-Si), and the middle layer 102 is N-type doped single crystal silicon (N-c-Si), the shell layer 103 is N + type amorphous silicon film (N + -a-Si); the front side of the silicon substrate 104 forms a submicron or micron silicon line array; the back side of the silicon substrate 104 is an intrinsic I-type amorphous silicon film 105 (I-a-Si) and P + type amorphous silicon film 106 (P + -a-Si), constituting the HIT structure. The front side of the P-type crystalline silicon wafer is a submicron or micron silicon line array, PN homogeneous NN+ heterojunction structure, the homojunction is the radial homojunction of crystalline silicon, and the heterojunction is the radial heterojunction of crystalline silicon / amorphous silicon Mass junction; the back of the silicon wafer i...
Embodiment 3
[0054] The battery structure includes, as figure 2 As shown, the silicon substrate 204 is P-type single crystal silicon (P-c-Si); the inner layer 201 of each silicon line is P-type single crystal silicon (P-c-Si), and the middle layer 202 is N-type doped single crystal silicon (N-c-Si), the shell layer 203 is N + type amorphous silicon film (N + -a-Si); the front side of the silicon substrate 204 forms a submicron or micron silicon line array; the back side of the silicon substrate 204 is P from top to bottom + type monocrystalline silicon 205 (P + -c-Si) and P ++ type amorphous silicon film 206 (P ++ -a-Si), forming PP + Homogeneous concentration junction and P + P ++ Heterogeneous concentration junction. The front side of the P-type crystalline silicon wafer is a submicron or micron silicon line array, PN homogeneous NN + Heterojunction structure, the homojunction is the radial homojunction of crystalline silicon, the heterojunction is the radial heterojunction of ...
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