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Mask pattern correction method

A graphics and mask technology, applied in the field of mask graphics correction, can solve the problems of large amount of pixelated mask data, computing speed bottlenecks, and inability to make mask manufacturing tools, and achieve the effect of improving computing speed

Active Publication Date: 2013-10-30
SHANGHAI MICRO ELECTRONICS EQUIP (GRP) CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

There are two problems with this method: the amount of mask data represented by pixelation is huge, and it cannot be produced by conventional mask manufacturing tools; Calibrated in the middle, the calculation error is large
No matter what kind of mask correction method is used, its operation speed is always the bottleneck of the production process

Method used

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Examples

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Embodiment Construction

[0044] Specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0045] First, the desired exposure pattern is defined as the initial mask pattern. Then, according to the accuracy required by the mask or the accuracy that can be corrected, the edge of the initial mask pattern is segmented, that is, the polygonal pattern of the circuit on the mask is transformed into one or a limited number of standard unit patterns that are linearly superimposed and described.

[0046] Such as figure 1 As shown, a typical mask pattern can be represented by a polygon, and the coordinates of each vertex of each pattern area can be defined in order. Usually, the edges of the mask pattern are all 0-degree or 90-degree directions.

[0047] Such as figure 2 As shown, a standard cell graph can be defined as follows:

[0048] Define a two-dimensional coordinate system. In this coordinate system, the value of the transparent ar...

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Abstract

The invention discloses a mask pattern correction method which comprises the following steps of: defining an expected exposure pattern as an initial mask pattern M(), defining a standard unit pattern T() of a standard unit pattern, converting the initial mask pattern into mask pattern information expressed by the standard unit pattern, wherein () is coordinates in a two-dimensional coordinate system; calibrating an imaging effect of the standard unit pattern which passes through an optical imaging system, and establishing a light intensity mapping table; calculating to obtain actual light intensity of a light intensity investigation point of an imaging party according to the mask pattern information and the light intensity mapping table; calculating to obtain the mask pattern correction amount to be used for correcting the initial mask pattern according to the difference between the actual light intensity and the expected light intensity of the expected exposure pattern. According to the method, the operational precision is guaranteed, and the operational speed is also greatly increased.

Description

technical field [0001] The invention relates to the field of photolithography mask correction, in particular to a mask pattern correction method. Background technique [0002] The design and manufacturing process of semiconductor chips can be divided into a series of processes such as chip system design, layout design, mask design, photolithography, packaging and testing, among which the photolithography link is to accurately expose the graphics on the mask to the silicon wafer , the exposure pattern on the silicon wafer is required to be consistent with the design pattern of the layout. [0003] Because the key equipment used in the lithography process—the lithography machine, uses the method of optical imaging to transfer graphics, and the optical imaging process itself has systematic high-frequency image information crosstalk and loss. At the same time, lithography equipment also has problems such as Influencing factors such as aberrations and vibrations will eventually ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G03F1/36
Inventor 杨志勇白昂力
Owner SHANGHAI MICRO ELECTRONICS EQUIP (GRP) CO LTD
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