Metal grid electrode manufacturing method and CMOS manufacturing method

Abstract

The invention discloses a metal grid electrode manufacturing method and a CMOS manufacturing method based on the metal grid electrode manufacturing method. The metal grid electrode manufacturing method includes the steps of providing a substrate which is provided with a pseudo grid structure, removing a pseudo polycrystalline silicon grid electrode to form a groove, sequentially depositing a metal work function layer and an isolating layer in the groove, depositing a polycrystalline silicon layer, filling the groove with the polycrystalline silicon layer, depositing an A1 metal layer on the polycrystalline silicon layer, conducting thermal annealing treatment so that the A1 metal layer and the polycrystalline silicon layer can be interchangeable and an A1 electrode can be formed, and removing the replaced polycrystalline silicon layer and A1 metal located outside the groove so that a metal grid electrode can be formed. According to the metal grid electrode manufacturing method and the CMOS manufacturing method, in the manufacturing process of smaller than 32nm, gaps in the A1 electrode can be prevented, and further the performance of semiconductor devices is prevented from being lowered.

Description

technical field [0001] The present invention relates to semiconductor manufacturing technology, in particular to a manufacturing method of a metal gate of a semiconductor device and a CMOS (Complementary Metal-Oxide-Semiconductor, Complementary Metal-Oxide Semiconductor) manufacturing method. Background technique [0002] With the continuous reduction of the feature size (CD, Critical Dimension) in the semiconductor manufacturing process, the high dielectric constant metal gate (HKMG) has replaced the original polysilicon gate, and is generally used in 45nm and 32nm and smaller in the process node of the feature size. The introduction of high dielectric constant metal gates solves the technical obstacles faced by traditional gates, such as reducing EOT (Equivalent Oxide Thickness, equivalent gate oxide thickness) and Vt (threshold voltage), reducing transistor leakage current, etc. In turn, the performance of the semiconductor device is improved. [0003] An existing metho...

AI Technical Summary

Problems solved by technology

The appearance of voids leads to a decrease in the conductivity of the Al metal electrode or even an open circuit, which in turn reduces the performance of the semiconductor device or even makes the semiconductor device invalid.

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