Method for manufacturing integrated circuit

Abstract

The invention provides a method for manufacturing an integrated circuit and relates to the field of integrated circuit manufacture. The method can reduce the process difficulty and improve the flexibility of integrated circuit process development and integrated circuit design. The method for manufacturing an integrated circuit comprises the following steps: forming an N well and a P well on a substrate; sequentially forming a field oxide layer, a first polycrystalline silicon layer pattern and an insulating medium layer pattern respectively on field regions of the N well and the P well, wherein the first polycrystalline silicon layer pattern includes a lower electrode plate of a double polycrystalline silicon capacitor located on the field oxide layer, and a first polycrystalline silicon layer resistor; forming a gate oxide layer on active regions of the N well and the P well; forming a second polycrystalline silicon layer pattern on the gate oxide layer, the field oxide layer and the insulating medium layer pattern, wherein the second polycrystalline silicon layer pattern includes a polycrystalline silicon gate located on the gate oxide layer, a second polycrystalline silicon layer low-value resistor located on the field oxide layer, and an upper electrode plate of the double polycrystalline silicon capacitor located on the insulating medium layer; and forming a source and drain regions in the active regions.

Description

technical field [0001] The invention relates to the field of integrated circuit manufacturing, in particular to an integrated circuit manufacturing method. Background technique [0002] A dual polysilicon integrated circuit is an integrated circuit that contains components (such as dual polysilicon capacitors) composed of two layers of polysilicon. In the traditional preparation process of double polysilicon integrated circuits, the first layer of polysilicon is used to make the metal oxide semiconductor (Metal-Oxide-Semiconductor, MOS) tube in the integrated circuit and the lower plate of the double polysilicon capacitor, and then the double polysilicon is fabricated The insulating dielectric layer of the capacitor, and then use the second layer of polysilicon to make the upper plate of the double polycrystalline capacitor. [0003] However, when the above-mentioned method is used to fabricate a double-polycrystalline integrated circuit, the process of fabricating the insu...

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Problems solved by technology

[0003] However, when the above-mentioned method is used to fabricate a double-polycrystalline integrated circuit, the process of fabricating the insulating dielectric layer of the double-polycrystalline capacitor and the upper plate of the double-polycrystalline capacitor will have an impact on the parameters and characteristics of the previously fabricated MOS transistors, so In actual production, the precision control requirements for MOS tubes are extremely high, and the process is difficult, and the parameters and characteristics of the produced MOS tubes will be different from those of the MOS tubes in integrated circuits that do not contain double polycrystalline components, making the integrated circuit Increased difficulty in circuit process development and integrated circuit design

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