A method for forming a metal silicide semiconductor

Abstract

The invention provides a method for forming a metal silicide semiconductor. The method includes the steps that a semiconductor substrate is provided; a grid dielectric layer, a polycrystalline silicon layer and a hard mask layer are sequentially formed on the substrate; the hard mask layer is patterned; a first gap wall is formed on the side wall of the patterned hard mask layer; the polycrystalline silicon layer and the grid dielectric layer are etched with the hard mask layer and the first gap wall as masks to form a grid structure; the hard mask layer and the first gap wall are removed; the polycrystalline silicon layer is partially etched with the hard mask layer or the first gap wall as the masks to form convex shapes or concave shapes; a self-aligning silicide forming technology is performed on the substrate and the concave or convex polycrystalline silicon layer; a source electrode and a drain electrode are formed in the substrate. Due to the fact that the area of the grid structure is enlarged, the use range of the self-aligning silicide forming technology is extended, a metal silicification layer with a larger area can be formed on the grid structure, so that grid resistance is lowered greatly, and speed of a device can be improved.

Description

technical field [0001] The present invention relates to the technical field of semiconductor manufacturing, more precisely, the present invention relates to a method for forming a metal silicide semiconductor. Background technique [0002] The self-aligned silicide formation process (salicide) is an important process in the manufacture of semiconductor devices, which is widely used to reduce the gate resistance of semiconductor devices, such as the gate sheet resistance of CMOS devices, so as to increase the speed of devices. Generally, this process includes: sputtering a metal layer on the surface of the semiconductor substrate, and then performing a rapid temperature annealing (RTA) process, so that the part of the metal layer in contact with the gate and source / drain regions reacts into a silicide metal layer, and completes Self-aligned metal silicide process (salicide). However, the gate resistance of semiconductor devices is also related to other factors, such as the l...

AI Technical Summary

Problems solved by technology

However, the gate resistance of semiconductor devices is also related to other factors, such as the length of the gate, that is, the length decreases and the gate resistance increases

Since the metal silicide is only formed on the surface of the gate, the problem of reducing the gate resistance is still not well solved in the prior art

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