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Preparation method of dangling graphene channel transistor with groove structure

A graphene channel and transistor technology, applied in the direction of transistors, semiconductor/solid-state device manufacturing, semiconductor devices, etc., can solve problems such as performance degradation, achieve the effect of increasing the characteristic frequency and avoiding the reduction of electrical characteristics

Inactive Publication Date: 2016-08-17
ZHONGBEI UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] The purpose of the present invention is to provide a method for preparing a suspended graphene channel transistor with a groove structure, so as to solve the problem of performance degradation caused by the direct contact between the graphene channel and the substrate and the gate dielectric layer

Method used

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  • Preparation method of dangling graphene channel transistor with groove structure
  • Preparation method of dangling graphene channel transistor with groove structure
  • Preparation method of dangling graphene channel transistor with groove structure

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preparation example Construction

[0023] A method for preparing a suspended graphene channel transistor with a groove structure, comprising the steps of:

[0024] 1) Take the substrate and etch grooves on the upper surface of the substrate. The number of grooves is single or multiple. When the number of grooves is multiple, the distance between two adjacent grooves is 5nm-5um. And at the same end of the plurality of grooves, a communication groove connecting the plurality of grooves is also etched; wherein, the substrate material is SiO 2 , SiO 2 / Si, quartz or plastic;

[0025] 2) Deposit a layer of conductive material on the bottom of the groove and the bottom of the connecting groove on the substrate as a gate electrode, and deposit a layer of gate dielectric on the gate electrode at the bottom of the groove; wherein, the conductive material It is a metal, semiconductor or polymer material, and the gate dielectric is SiO 2 、Si 3 N 4 、 Ta 2 o 5 、Pr 2 o 3 , HfO 2 、Al 2 o 3 or ZrO 2 ;

[0026] 3)...

Embodiment 1

[0031] A method for preparing a suspended graphene channel transistor with a groove structure, comprising the following steps: 1) Take a SiO2 substrate, and form a linear groove on the upper surface of the SiO2 substrate by photolithography, and the width of the groove is 50nm , the depth is 200nm, and the length is 50μm; 2) Deposit a layer of conductive material Cr / Au on the bottom of the groove on the SiO2 substrate as the gate electrode. Au, in which the Cr layer is a buffer layer, and a gate dielectric is deposited on the gate electrode, and the gate dielectric is an Al2O3 layer with a thickness of 5nm; 3) A layer of graphite that completely covers the groove is transferred on the upper surface of the SiO2 substrate by CVD Graphene film, the excess graphene film is removed by etching, and there is an air gap between the gate dielectric in the groove and the graphene film; 4) A conductive layer is deposited on the graphene film on both sides of the groove. Material Cr / Au, o...

Embodiment 2

[0033]A method for preparing a suspended graphene channel transistor with a groove structure, comprising the following steps: 1) Take a quartz substrate, and form two linear grooves (double-gate concave grooves) on the upper surface of the quartz substrate by dry etching. Groove structure), the width of the groove is 30nm, the depth is 200nm, and the length is 80μm. The same end of the two linear grooves is dry-etched to form a connecting groove connecting the two grooves; 2) on the quartz substrate Deposit a layer of conductive material Ti / Au on the bottom of the groove on the bottom and the bottom of the connecting groove as the gate electrode. The conductive material Ti / Au includes Ti with a thickness of 15 nm in the lower layer and Au with a thickness of 85 nm in the upper layer, wherein the Ti layer is a buffer layer , and deposit a layer of gate dielectric on the gate electrode, the gate dielectric is Ta with a thickness of 5nm 2 o 5 layer; 3) On the upper surface of th...

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Abstract

The invention discloses a method for manufacturing a suspended graphene channel transistor of a groove structure. The method solves the problem that as a graphene channel makes direct contact with a substrate and a gate dielectric layer, the performance is lowered. The method comprises the steps that the groove structure is formed in the substrate, a gate electrode and a gate dielectric are manufactured at the bottom of the groove, then a graphene film is transferred to the substrate to cover the groove, a source electrode and a drain electrode are manufactured on the two sides of the graphene film, a suspended graphene channel is formed between the graphene film and the gate dielectric, and the graphene channel is prevented from making direct contact with the substrate and the gate dielectric. By the suspended graphene channel, the influence on the basic characteristic of the graphene from the substrate and the gate dielectric is avoided, and then the performance of the graphene transistor is improved.

Description

technical field [0001] The invention relates to transistor processing and preparation technology, in particular to a method for preparing a suspended graphene channel transistor with a groove structure. Background technique [0002] Graphene, also known as single-layer graphite, is a carbon atom with sp 2 The hybridized orbitals form a hexagonal planar film with a honeycomb lattice, a two-dimensional material with a thickness of only one carbon atom. Graphene is currently recognized as the thinnest and hardest nano-scale material in the world. It is almost transparent and has a high thermal conductivity, which is higher than that of carbon nanotubes and diamond. At room temperature, the electron transfer speed of graphene is faster than any known conductor. And the resistivity is lower than copper or silver. Due to the above outstanding properties, graphene is a new generation of breakthrough materials in the field of electrical, electronic and aerospace in the future. ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336
CPCH01L29/1033H01L29/1606H01L29/66568
Inventor 张文栋薛晨阳王永存熊继军刘俊刘耀英高立波王永华
Owner ZHONGBEI UNIV