Preparation method of dangling graphene channel transistor with groove structure
A graphene channel and transistor technology, applied in the direction of transistors, semiconductor/solid-state device manufacturing, semiconductor devices, etc., can solve problems such as performance degradation, achieve the effect of increasing the characteristic frequency and avoiding the reduction of electrical characteristics
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
preparation example Construction
[0023] A method for preparing a suspended graphene channel transistor with a groove structure, comprising the steps of:
[0024] 1) Take the substrate and etch grooves on the upper surface of the substrate. The number of grooves is single or multiple. When the number of grooves is multiple, the distance between two adjacent grooves is 5nm-5um. And at the same end of the plurality of grooves, a communication groove connecting the plurality of grooves is also etched; wherein, the substrate material is SiO 2 , SiO 2 / Si, quartz or plastic;
[0025] 2) Deposit a layer of conductive material on the bottom of the groove and the bottom of the connecting groove on the substrate as a gate electrode, and deposit a layer of gate dielectric on the gate electrode at the bottom of the groove; wherein, the conductive material It is a metal, semiconductor or polymer material, and the gate dielectric is SiO 2 、Si 3 N 4 、 Ta 2 o 5 、Pr 2 o 3 , HfO 2 、Al 2 o 3 or ZrO 2 ;
[0026] 3)...
Embodiment 1
[0031] A method for preparing a suspended graphene channel transistor with a groove structure, comprising the following steps: 1) Take a SiO2 substrate, and form a linear groove on the upper surface of the SiO2 substrate by photolithography, and the width of the groove is 50nm , the depth is 200nm, and the length is 50μm; 2) Deposit a layer of conductive material Cr / Au on the bottom of the groove on the SiO2 substrate as the gate electrode. Au, in which the Cr layer is a buffer layer, and a gate dielectric is deposited on the gate electrode, and the gate dielectric is an Al2O3 layer with a thickness of 5nm; 3) A layer of graphite that completely covers the groove is transferred on the upper surface of the SiO2 substrate by CVD Graphene film, the excess graphene film is removed by etching, and there is an air gap between the gate dielectric in the groove and the graphene film; 4) A conductive layer is deposited on the graphene film on both sides of the groove. Material Cr / Au, o...
Embodiment 2
[0033]A method for preparing a suspended graphene channel transistor with a groove structure, comprising the following steps: 1) Take a quartz substrate, and form two linear grooves (double-gate concave grooves) on the upper surface of the quartz substrate by dry etching. Groove structure), the width of the groove is 30nm, the depth is 200nm, and the length is 80μm. The same end of the two linear grooves is dry-etched to form a connecting groove connecting the two grooves; 2) on the quartz substrate Deposit a layer of conductive material Ti / Au on the bottom of the groove on the bottom and the bottom of the connecting groove as the gate electrode. The conductive material Ti / Au includes Ti with a thickness of 15 nm in the lower layer and Au with a thickness of 85 nm in the upper layer, wherein the Ti layer is a buffer layer , and deposit a layer of gate dielectric on the gate electrode, the gate dielectric is Ta with a thickness of 5nm 2 o 5 layer; 3) On the upper surface of th...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More 