Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Insulated gate bipolar transistor and preparation method thereof

A technology of bipolar transistors and insulated gates, which is applied in the direction of transistors, semiconductor/solid-state device manufacturing, semiconductor devices, etc., can solve the problems of increasing the difficulty of device manufacturing and small on-state voltage drop, so as to improve the range of high-frequency applications and reduce Effect of on-resistance

Active Publication Date: 2014-03-26
青岛惠科微电子有限公司
View PDF4 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] Generally speaking, from the front structure of the IGBT, the IGBT can be divided into two types: planar type and trench gate type; from the breakdown characteristics of the IGBT, it can be divided into two types: the punch-through type and the non-punch-through type. The P+ surface on the back of the device has an N+ buffer layer, and its on-state voltage drop is smaller than that of the non-punch-through type, and the punch-through type device also increases the difficulty of manufacturing the device

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Insulated gate bipolar transistor and preparation method thereof
  • Insulated gate bipolar transistor and preparation method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0012] figure 1 It is a cross-sectional view of an insulated gate bipolar transistor of the present invention, combined below figure 1 The semiconductor device of the present invention will be described in detail.

[0013] An insulated gate bipolar transistor, comprising: a rear P+ emitter region 1, which is a polycrystalline semiconductor silicon material of P conductivity type, with a thickness of 0.2um and a surface doping concentration of boron atoms of 5E17cm -3 ; N+ buffer layer 2, located on the back P+ emitter region 1, is a semiconductor silicon material of N conductivity type, and the doping concentration of phosphorus atoms is 5E13cm -3 ~1E16cm -3 , with a thickness of 30um; the N-base region 3, located on the N+ buffer layer 2, is a semiconductor silicon material of N conductivity type, with a thickness of 200um and a doping concentration of phosphorus atoms of 5E13cm -3 ; P-type base region 4, located on the N-base region 3, is a semiconductor silicon material ...

Embodiment 2

[0021] figure 2 It is a cross-sectional view of the second insulated gate bipolar transistor of the present invention, combined below figure 2 The semiconductor device of the present invention will be described in detail.

[0022] An insulated gate bipolar transistor, comprising: a rear P+ emitter region 1, which is a polycrystalline semiconductor silicon material of P conductivity type, with a thickness of 0.2um and a surface doping concentration of boron atoms of 5E17cm -3 ; N+ buffer layer 2, located on the back P+ emitter region 1, is a semiconductor silicon material of N conductivity type, and the doping concentration of phosphorus atoms is 5E13cm -3 ~1E16cm -3 , with a thickness of 30um; the N-base region 3, located on the N+ buffer layer 2, is a semiconductor silicon material of N conductivity type, with a thickness of 200um and a doping concentration of phosphorus atoms of 5E13cm -3 ; P-type base region 4, located on the N-base region 3, is a semiconductor silicon...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

PropertyMeasurementUnit
Thicknessaaaaaaaaaa
Thicknessaaaaaaaaaa
Doping concentrationaaaaaaaaaa
Login to View More

Abstract

The invention discloses an insulated gate bipolar transistor. A P type base region, an N+ collector region, a gate oxide and a gate dielectric are arranged on the surface of an N type base region, and a polycrystalline P-type semiconductor material is arranged on the lower surface of the N type base region to be used as a back P+ emitter region of a device. The insulated gate bipolar transistor reduces the on-resistance of the device and improves the high-frequency application ability of the device. The invention also provides a preparation method of the insulated gate bipolar transistor.

Description

technical field [0001] The invention relates to an insulated gate bipolar transistor, and also relates to a preparation method of the insulated gate bipolar transistor. Background technique [0002] Insulated Gate Bipolar Transistor (IGBT) is a combination of gate voltage control characteristics of metal oxide semiconductor field effect transistor (MOSFET) and low on-resistance characteristics of bipolar transistor (BJT). Semiconductor power devices have the characteristics of voltage control, large input impedance, low driving power, small on-resistance, low switching loss and high operating frequency. They are ideal semiconductor power switching devices and have broad development and application prospects. [0003] Generally speaking, from the front structure of the IGBT, the IGBT can be divided into two types: planar type and trench gate type; from the breakdown characteristics of the IGBT, it can be divided into two types: the punch-through type and the non-punch-through...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L29/739H01L29/06H01L21/331
CPCH01L29/0804H01L29/36H01L29/66333H01L29/7393
Inventor 朱江
Owner 青岛惠科微电子有限公司
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products