Wideband sample-and-hold circuit for the front-end of a successive-approximation analog-to-digital converter

A technology of sample-and-hold circuits and analog-to-digital converters, applied in analog/digital conversion, code conversion, instruments, etc., can solve problems such as difficult to meet bandwidth requirements, achieve the goal of improving bandwidth, meeting signal linearity, and saving hardware overhead Effect

Active Publication Date: 2017-04-05
CHINA ELECTRONIC TECH GRP CORP NO 38 RES INST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the traditional successive approximation analog-to-digital converter has an input sampling bandwidth below several hundred MHz
It is difficult to meet the bandwidth requirements of the back-end software radio receiver for ultra-high-speed input signals (above GHz)
Therefore, the bandwidth and power consumption of the sample-and-hold circuit of the existing structure become the bottleneck of the performance improvement of the successive approximation analog-to-digital converter

Method used

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  • Wideband sample-and-hold circuit for the front-end of a successive-approximation analog-to-digital converter
  • Wideband sample-and-hold circuit for the front-end of a successive-approximation analog-to-digital converter
  • Wideband sample-and-hold circuit for the front-end of a successive-approximation analog-to-digital converter

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Embodiment Construction

[0027] The present invention will be described in further detail below in conjunction with the accompanying drawings.

[0028] see figure 1 , a broadband sample-and-hold circuit for the front end of the successive approximation analog-to-digital converter, consisting of a first-stage voltage buffer 1, a clock processing unit 2, a sampling switched capacitor sub-circuit 3, and a second-stage voltage buffer 4; The signal output end of the primary voltage buffer 1 is connected to the signal input end of the sampling switched capacitor sub-circuit 3; the signal output end of the sampling switched capacitor sub-circuit 3 is connected to the signal input end of the second-stage voltage buffer 4; the clock processing unit 2 Provide clock signals to the first-stage voltage buffer 1 and the sampling switched capacitor sub-circuit 3 respectively; the first-stage voltage buffer 1 is responsible for isolating the sampling switched capacitor sub-circuit 3 from the previous stage circuit, r...

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Abstract

The invention provides a broadband sampling holding circuit used for a successive approximation type analog-to-digital converter front end. The objective of the invention is to eliminate the defects of an existing sampling holding circuit. The broadband sampling holding circuit is composed of a first-stage voltage buffer, a clock processing unit, a sampling switched capacitor sub circuit and a second-stage voltage buffer; the output end of the first-stage voltage buffer is connected with the input end of the sampling switched capacitor sub circuit controlled by a voltage bootstrapping unit circuit; a signal output end of the sampling switched capacitor sub circuit is connected with a signal input end of the second-stage voltage buffer; and the clock processing unit provides clock signals for the first-stage voltage buffer and the sampling switched capacitor sub circuit respectively. According to the broadband sampling holding circuit of the invention, the broadband-reinforced and clock-controlled first-stage voltage buffer and the second-stage voltage buffer of a PMOS source follower which is used for performing replication unit biasing on N wells are adopted, and therefore, the bandwidth of input sampling signals can be improved, and at the same time, a requirement for signal linearity can be satisfied with extremely low power consumption.

Description

technical field [0001] The invention belongs to the technical field of analog integrated circuit design, and in particular relates to a broadband sampling and holding circuit used for the front end of a successive approximation analog-to-digital converter. Background technique [0002] With the development of advanced manufacturing process technology for integrated circuits, the semiconductor process has been developed to nodes below 20 nanometers. Advances in semiconductor technology have brought features such as low power supply voltage, low power consumption, high integration, and small chip area to digital circuits; but for analog circuits, the design of traditional devices has become more complicated and difficult to implement. Therefore, it has become a research hotspot to convert as many functions as possible from the analog domain to the increasingly powerful digital domain in the circuit system. The analog-to-digital converter is the bridge and link between the dig...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M1/54
Inventor 孙金中郭锐高艳丽谢凤英朱家兵
Owner CHINA ELECTRONIC TECH GRP CORP NO 38 RES INST
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