A storage array, a memory, a reading method thereof, and an electronic device are disclosed. The storage array includes multiple
storage cell subarrays, a
reference cell column, and a set of reference
voltage generation circuits,
reference cell switching circuits, and read word line control circuits. The
storage cell subarrays and
reference cell column in two storage arrays are electrically connected via read bit lines and symmetrically distributed around a read
decision unit. The transistors of the reference cells and storage cells are isomorphic and have the same circuit structure. The memory includes at least one pair of open storage arrays, each pair comprising a first storage array, a second storage array, and a set of read decision units. Each storage array is electrically connected to one of the two input terminals of the read
decision unit. During reading, the two storage arrays provide a read
voltage and a reference
voltage, respectively. The two input terminals of the read
decision unit have similar RC parameters, and the drift generated by the voltages at the two input terminals is also matched. This application improves storage density and data reading reliability.