Transistor forming method

Abstract

Provided is a transistor forming method which comprises: providing a semiconductor substrate, wherein a gate structure is disposed on the surface of the semiconductor substrate and comprises a gate dielectric layer and a gate electrode layer on the surface of the gate dielectric layer, the gate electrode layer is produced by metal material, and the surface of the semiconductor substrate also comprises a dielectric layer covering the sidewall of the gate structure; forming a sacrificial layer on the surfaces of the dielectric layer and the gate electrode layer, wherein the sacrificial layer comprises metal atoms different from the metal material of the gate electrode layer; diffusing the metal atoms in the sacrificial layer into the gate electrode layer by using thermal annealing technology in order to form a covering layer on the surface of the gate electrode layer; and removing the sacrificial layer residing at the surfaces of the covering layer and the dielectric layer. A formed transistor has excellent performance.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming a transistor. Background technique [0002] With the rapid development of integrated circuit manufacturing technology, the size of semiconductor devices in integrated circuits, especially MOS (Metal Oxide Semiconductor, metal-oxide-semiconductor) devices, has been continuously reduced to meet the miniaturization and development of integrated circuits. Integration requirements. In the process of continuous shrinking of the size of MOS transistor devices, the process of using silicon oxide or silicon oxynitride as the gate dielectric layer in the existing process is challenged. Transistors formed with silicon oxide or silicon oxynitride as the gate dielectric layer have some problems, including increased leakage current and diffusion of impurities, which affect the threshold voltage of the transistor and further affect the performance of se...

AI Technical Summary

Problems solved by technology

[0005] However, the transistor performance of the prior art high-K dielectric layer and metal gate structure is not good

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