FinFET with SiGe source region and SiGe drain region and forming method of FinFET

Abstract

The invention provides a FinFET with a SiGe source region and a SiGe drain region and a forming method of the FinFET. The method includes the following steps of providing a substrate, forming a Si fin-shaped structure on the upper portion of the substrate, forming gate stacking or a fake gate on the upper portion of the Si fin-shaped structure, forming openings of the source region and the drain region on the two sides of the gate stacking or the fake gate, exposing the Si fin-shaped structure at the opening positions, and injecting atoms, molecules, ions or plasmas containing Ge elements into the Si fin-shaped structure so that SiGe layers can be formed at the opening positions. According to the forming method of the FinFET, the FinFET with the SiGe source region and the SiGe drain region can be formed, the SiGe source region and SiGe drain region are thin, crystalline quality is good, and accordingly the FinFET has good electrical property, and the method has the advantages of being simple, easy to carry out and low in cost.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a FinFET with SiGe source and drain and a forming method thereof. Background technique [0002] Metal-oxide-semiconductor field-effect transistors (MOSFETs) have served the integrated circuit industry for over forty years. People have invented a variety of ingenious techniques to make the feature size shrink continuously, but it has not changed its basic structure. However, the integrated circuit design window, including performance, dynamic power consumption, static power consumption, and device tolerances, has shrunk to the point where a new transistor structure has to be invented. As the gate length continues to shrink, the transfer characteristics of the MOSFET (I ds -V gs ) degenerates mainly in two aspects. One is that the subthreshold slope becomes larger and the threshold voltage decreases, that is, by reducing the gate electrode voltage V gs MOS devices ca...

AI Technical Summary

Problems solved by technology

[0006] The present invention aims to solve at least to a certain extent the above-mentioned problems of difficulty in forming a good-quality SiGe film in the source and drain of FinFET, complicated process and high production cost.

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