Method for testing uneven damage to channel of MOS device

Abstract

The invention discloses a method for testing uneven damage to a channel of an MOS device. The method mainly solves the problem that in the prior art, the uneven damage effect on the channel can hardly be quantitatively analyzed. The method includes the steps of firstly, setting the standard leak current and the standard low leak voltage of the device; secondly, scanning the grid voltage under the standard low leak voltage to obtain the grid voltage V[g0]when the leak current reaches a standard value; thirdly, measuring the grid voltage V[g] to obtain the grid voltage difference delta V[g0] through the same method under the stress condition; fourthly, measuring the grid voltage difference delta V[gi] after multiple sets of high leak voltages are exerted; fifthly, drawing a forward test pattern according to a specific value of delta V[gi] to delta V[g0]; sixthly, changing the arrangement of a port to conduct reverse test so as to obtain a reverse test pattern; seventhly, obtaining the proportion of uneven damage to all positions of the channel and the influences on device degeneration by quantizing the forward test pattern and the reverse test pattern. According to the method, uneven damage to the channel of the MOS device can be effectively monitored, the influences of the uneven damage to the channel of the MOS device on device degeneration and the proportion of the uneven damage can be quantized, and the method can be used for quality detection of the device.

Description

technical field [0001] The invention belongs to the technical field of microelectronics, relates to a test method of a metal-oxide-semiconductor MOS device, and can be used for testing and analyzing uneven damage to a channel of the MOS device. Background technique [0002] With the rapid development of semiconductor devices, semiconductor devices have entered the nano-MOS era, and the size of devices is required to be smaller and smaller. The reliability problem of miniaturized devices is still closely related to the gate length, such as figure 1 shown. In the case of continuous shortening of the channel, even if the self-alignment technology is adopted, the gate-source and gate-drain regions still inevitably cause a certain overlap. Gate source L gs and gate-drain L gd The length of the part is determined by the process and basically remains unchanged, and the two are likely to cause greater damage during the device fabrication process. As the gate length decreases, t...

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Problems solved by technology

[0003] At present, the analysis of uneven damage to the channel of MOS devices is mainly carried out through the qualitative method of observation, that is, the use of cross-sectional transmission electron microscopy for test analysis. This method not only requires expensive equipment support but also complicated operation, and most importantly, it is difficult to quantify Analyzing the impact of each part of the channel on device degradation and its proportion, it is impossible to effectively analyze the impact of damage in different areas of the channel on device reliability, and it is impossible to improve the defects in the device design and process, resulting in poor device quality. Meet the use requirements

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