LDMOS ESD device

Abstract

The invention relates to the technical field of electrostatic discharge protection of an integrated circuit, in particular to an LDMOS ESD device. According to the LDMOS ESD device, a P+ doping region is led to the position below a source region and a drain region, so that higher second breakdown currents are obtained in the LDMOS ESD device. When ESD impact occurs, a parasitic transistor serves as a main electrostatic discharger, so that electrostatic discharge currents in a unit area of the LDMOS ESD device are magnified, and a higher ESD protection level is obtained. Additionally, trigger voltage of the LDMOS ESD device is led in through a P+ doping layer of the LDMOS transistor, and according the trigger voltage is adjustable.

Description

technical field [0001] The invention relates to the technical field of electrostatic discharge protection of integrated circuits, in particular to an LDMOS ESD device. Background technique [0002] The electrostatic discharge (Electrostatic Discharge, ESD) phenomenon of integrated circuits is a transient process in which a large amount of charge is poured into the integrated circuit from the outside to the inside when the chip is floating. Since the internal resistance of the integrated circuit chip is very low, when the ESD phenomenon occurs, an instantaneous (time-consuming 100-200 nanoseconds, rise time is only about 0.1-10 nanoseconds), high peak (several amperes) current will be generated, and A large amount of Joule heat is generated, which will cause the failure of the integrated circuit chip. [0003] For high-voltage power integrated circuits, Lateral Double Diffusion Metal-Oxide-Semiconductor (LDMOS) transistors are widely used as protection devices for high-volta...

AI Technical Summary

Problems solved by technology

However, the parasitic bipolar transistor inside the LDMOS transistor is affected by the base widening effect. After the avalanche breakdown occurs, a large hysteresis will occur, and the current will rise rapidly. When entering the hysteresis point, the LDMOS transistor will quickly enter thermal breakdown. status, ESD cannot continue

Therefore, the electrostatic discharge current per unit area of ​​the existing LDMOS ESD devices is small, and it is difficult to obtain a high level of ESD protection

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