89 results about "Thermal breakdown" patented technology

The invention discloses a polymer dielectric medium with low dielectric constant and low loss and a preparation method of the polymer dielectric medium. The polymer dielectric medium comprises the following raw materials: 50-60% of epoxy resin system, and 40-50% of mixed boron nitride nanoparticles, wherein the mixed boron nitride nanoparticle is a mixture of a boron nitride nanotube and a boron nitride nanotube; the epoxy resin system is formed by 100phr of epoxy resin E-51, 85phr of methyl hexahydrophthalic anhydride and 1phr of benzyl dimethylamine in a mixing manner. The thermal breakdown voltage of the polymer dielectric medium is significantly improved by the polymer dielectric material with high heat conductivity and high electric breakdown, the service life is prolonged, the dielectric constant and loss and the heat expansion coefficient are reduced, the mechanical strength and the tenacity are improved, the highest heat conductivity can be up to 5.26W/mK, the volume resistivity is about 1014ohm.cm, the thermal breakdown voltage is about 2-3kV/mm higher than that of the similar heat-conducting polymer dielectric medium, and the dielectric constant and the loss are a little lower than those of pure resin.

The invention relates to a high-pressure gas breaker breaking performance assessment method and system. The method comprises the following steps of: carrying out magnet dynamic simulation on an arcing process of a high-pressure gas breaker to obtain total arc voltage and arc current before the arc current crosses zero; extracting model parameters of a preset zero area arc model; taking the total arc voltage and the arc current as initial conditions to solve past-arc current under the action of transient recovery voltage on the basis of the zero area arc model; judging whether the high-pressure gas breaker causes thermal breakdown or not in the breaking process according to change trend of the past-arc current; obtaining pressure intensity distribution and temperature distribution in an arc extinction chamber under the action of the past-arc current through magnet dynamic simulation, comparing field intensity, caused by the action of the transient recovery voltage, at each point of the arc extinction chamber, corresponding temperature and critical breakdown field intensity, and assessing the probability of electric breakdown in the arc extinction chamber. By adoption of the method and system provided by the invention, the comprehensive assessment for the past-arc thermal breakdown and electric breakdown characteristics of the high-pressure gas breaker is realized.

The invention discloses an insulated gate bipolar transistor with a dielectric layer at a collector terminal, belonging to the technical field of power semiconductor devices and power integrated circuits. According to the invention, a continuous or discontinuous dielectric layer is introduced into a region of the terminal collector of a device on the basis of a traditional structure of the insulated gate bipolar transistor. According to the invention, the effective hole emission efficiency in the region of the terminal collector of the device can be significantly reduced due to the dielectric layer introduced, so that the hole injections at the terminal of the device can be reduced. When the device is cut off, the phenomenon of current concentration around an equipotential ring of the terminal of the device can be effectively inhibited due to the reduction of the hole injections in the region of the collector of the terminal, so that the thermal breakdown and the dynamic avalanche breakdown caused by the current concentration can be inhibited and eliminated, the cut-off ability of the insulated gate bipolar transistor can be effectively improved, and the reliability of the device can be improved.

An electrically programmable fuse includes a metal-oxide-semiconductor (MOS) programmable transistor that is gate-source coupled by a resistive element. The resistive element can comprise a gate-source coupled MOS transistor. If the MOS transistor is unprogrammed, then the resistive element ensures that the programmable transistor is turned off during read operations. However, when a programming voltage is applied across the source and drain terminals of the programmable transistor, the resistive element allows the programming voltage to be capacitively coupled to the gate of the programmable transistor from its drain. This turns the programmable transistor on, thereby reducing the snapback voltage of the programmable transistor, and hence, the required programming voltage. Once the snapback mode is entered, current flow through the programmable transistor increases until thermal breakdown occurs and the programmable transistor shorts out. The programmable transistor will then behave as a constant-on transistor during all subsequent read operations.

The invention provides a linear motor driver which comprises a current feedback loop module, a power module, a detecting module, and a state analysis and control module. The motor driver is characterized in that the current feedback loop module comprises a preposing input stage module, an adder module, a low pass filter module, a power amplification feedback module, a loading module, a current sampling amplification module and a gain adjustment module which are connected in sequence; and the output signal of the gain adjustment module is connected on the input end of the adder module finally, thus forming a loop. The linear motor driver has the characteristics of high linearity, wide bandwidth, good stability, small interference to outside, and strong capacity of resisting disturbance, and is small in volume and low in cost. As the temperature coefficient of the drain-source resistance of the power amplifier is positive, when the temperature of the power amplifier rises, the current is limited, therefore, no thermal breakdown occurs, and consequently, no secondary breakdown occurs.

The invention discloses a bidirectional false gate deep well electrostatic protection device for increasing failure voltage, comprising a P-type substrate; an N-type buried layer and a high-voltage Nwell are arranged in the P-type substrate is provided with; a first P well, an N well and a second P well are arranged in the high-pressure N well; a first P+ implantation region and a first N+ implantation region are arranged in the first P well; a first PB implantation region is arranged between the first P well and the N well in a spanning manner; a second PB implantation region is arranged between the N well and the second P well in a spanning manner; the surface of the N well is provided with a first polysilicon dummy gate; a second N+ implantation region and a second P+ implantation region arranged in the second P well; and the first PB implantation region, the first polysilicon dummy gate, and the second PB implantation region constitute a polysilicon dummy gate deep well PB structure. The polysilicon dummy gate deep well PB structure of the invention can enable the ESD conduction path of the device to be bleeded in the N-type buried layer, the device can withstand high-intensity electrostatic pulse stress, and the device structure surface can be prevented from generating additional access, thereby effectively avoiding the phenomenon of thermal breakdown on the device surface.

The invention discloses a metal oxide arrester. The metal oxide arrester comprises a hollow insulating cylinder, an upper metal sealing plate, a lower metal sealing plate, a conducting post and a cluster parachute, wherein the upper metal sealing plate is arranged on the upper end of the hollow insulating cylinder, the lower metal sealing plate is arranged on the lower end of the hollow insulating cylinder, the conducting post is axially arranged in the hollow insulating cylinder, the cluster parachute covers the outer surface of the hollow insulating cylinder, a gap radially exists between the hollow insulating cylinder and the conducting post, the upper end of the conducting post makes contact with the upper metal sealing plate, the lower end of the conducting post makes contact with the lower metal sealing plate, and the conducting post is formed in a way that zinc oxide resistance discs and metal conductors are alternately overlapped. The invention provides the metal oxide arrester with high heat dissipation performance, and the problem of easiness in thermal breakdown and thermal explosion of a metal oxide arrester with an existing structure is solved.

The invention relates to a method for improving the power density of an electric energy conversion device and discloses an IGBT (insulated gate bipolar transistor) parameter limit use design method based on thermal equilibrium analysis; according to an IGBT thermal breakdown failure mechanism, an established IGBT electric heating model is adopted for simulation to obtain a temperature curve on the breakover power consumption, the switching power consumption and the off-state power consumption in the condition with given parameters, temperature curves of the IGBT total power consumption is obtained by addition, a heat transfer power consumption curve is obtained according to junction-shell steady state thermal resistance, and the thermal equilibrium analysis is carried out by combining the IGBT total power consumption curve with the heat transfer power consumption curve, wherein the junction temperature during tangency of the two curves is the IGBT limit junction temperature, and the corresponding parameter value is the limit use value under the circuit condition. According to the invention, the IGBT parameter limit use design method is clear in principle and strong in operability, the actual test work load is reduced, the accurate quantization of parameter limit use is achieved, and the power density of the device is improved.

The invention relates to a formula of polymer dielectric substance with good heat conductivity, high dielectric coefficient and low dielectric loss and a preparation process of the formula, belonging to the crossed field of an electric engineering material and the chemical product manufacturing technique. The polymer dielectric substance is prepared from polyvinylidene fluorine, carbon nanofibers with modified surface, and micron composite structure aluminum particles with ultrafine particle size through the procedures of dissolving, mixing, agitating, ultrasonically processing, high-speed dispersing, separating, drying, baking, laminating and hot-pressing. According to high heat conductivity of the novel polymer dielectric substance prepared by the invention, the thermal breakdown voltage of the dielectric medium is improved and the service life of the dielectric medium is also prolonged. The dielectric substance has the advantages of simpler preparation technique and better processing property. The material prepared by the invention is mainly used for preparing an embedded non-coupling capacitor, a chip multi-layer organic film capacitor, a high-energy storage capacitor element and the like. The polymer dielectric substance is widely applied to circuit devices of devices such as a high-frequency communication device, an LED illumination device, an automotive electronics device, a computer, a switch power supply and the like.

An LED lighting circuit capable of preventing thermal breakdown, including: an LED module, having a top end coupled to a line voltage; and a controller, coupled to the line voltage and a bottom end of the LED module, the controller including: an amplifier, having a positive input end coupled to an adjustable reference voltage; a transistor, having a gate terminal coupled to an output end of the amplifier, a first channel terminal coupled to the bottom end of the LED module, and a second channel terminal coupled to a negative input end of the amplifier; a current sensing resistor, coupled between the second channel terminal and a ground; and a reference voltage generator, used for generating the adjustable reference voltage according to the line voltage.

The invention discloses a self healing capacitor with security protection technology. The self healing capacitor with security protection technology comprises a shell body made from flame retardant plastics or metal; the inner cavity of the shell body is embedded with a capacitance core formed by winding a metallized polypropylene film in a sealing way and a flame retardant epoxide resin body is filled between the capacitance core and the inner cavity of the shell body; a first electric contact and a second electric contact are correspondingly manufactured at an upper end head and a lower end head of the capacitance core; the second electric contact is electrically connected with an electric current fuse which is electrically connected with a second leading-out end line; and the first electric contact is electrically connected with a first leading-out end line. The selective match of the electric current fuse is precisely configured with capacitance current level and the electric current fuse can keep normal work in product test and normal operation and can blow out immediately to cut off the power supply loop of the capacitance core due to occurrence of severe self-healing discharging in the operation of the capacitance core or due to the occurrence of instant impact current at the thermal breakdown moment, thereby avoiding product explosion and accidents as a result of the enlargement of a fault point.

The invention relates to a production process for diodes. The production process comprises five steps of acid washing, electroplating, welding, insulation protection and post-treatment. The production process for the diodes has the advantages that the steps of acid washing, welding and welding are performed in sequence; a chip is subjected to acid corrosion before welding, so that solders and metal impurities in lead wires are prevented from reacting with an acid liquid to influence a corrosive rate of the chip in the acid washing process; metal ions generated by reaction of metal and acid are prevented from being adhered to the surface of the chip, so that large amounts of washing processes are removed and resources are saved; the faults such as electric degradation and high-temperature thermal breakdown of a product are avoided, so that the electric yield of the product is increased; and meanwhile, the metal content of a discharged washing liquid is reduced and the soil pollution is alleviated, so that the environmental protection is facilitated.

A semiconductor device protection circuit for a semiconductor device driving circuit that switches a voltage-controlled semiconductor device ON and OFF includes a current detection circuit that detects current flowing through the semiconductor device and generates and outputs a current detection voltage representing the detected current; an overcurrent detection circuit that compares the current detection voltage to a variable overcurrent detection threshold voltage so as to detect for overcurrent flowing through the semiconductor device; a protection circuit that, when the overcurrent detection circuit detects overcurrent, controls the ON/OFF switching of the semiconductor device so as to prevent thermal breakdown of the semiconductor device; and a gate voltage detection circuit that, in accordance with a gate voltage of the semiconductor device, selectively sets the overcurrent detection threshold voltage to either a first threshold voltage or a second threshold voltage that is lower than the first threshold voltage.

The invention relates to a production process of a diode. The production process comprises five procedures, namely, acid pickling, electroplating, welding, insulation protection and post-treatment. According to the production process of the diode of the invention, at first, acid pickling is performed, and then welding is performed; acid corrosion is performed on chips before welding is performed,so that metal impurities in solder and leads will not react with an acid solution during the acid pickling, so that the corrosion rate of the chips will not be affected; a condition that metal ions generated by the reaction of metal with acid are attached onto the surfaces of the chips can be avoided, and therefore, a lot of cleaning processes can be eliminated, and resources can be saved; a gradient heating welding mode is adopted, so that faults such as the electrical property attenuation of products and the thermal breakdown of the products under high temperature can be avoided, the electrical property yield of the products can be improved; and metal content in discharged cleaning fluid is low, so that pollution made to soil can be reduced, and therefore, environmental protection can befacilitated.

The invention provides a high-voltage power transmission strain clamp residual life prediction method. The method comprises steps: the actual operation environment parameters of the strain clamp are acquired; a corrosion rate test is carried out to determine a resistance growth rate-corrosion time relation function; a temperature rise test is carried out to determine a heat dissipation coefficient; a lab strain clamp corrosion time-temperature model is built; a service corrosion time and lab corrosion time relation is determined; an environmental correction factor A is calculated and an environmental factor K is determined; critical breakdown temperature is calculated; and the clamp residual life is determined. The method of the invention has the beneficial effects that the residual life of the old and aged strain clamp can not be evaluated can be solved; the method is based on a thermal breakdown principle, strain clamp failure conditions are quantized, and the strain failure judgment is more scientific.

The invention provides a filament mechanism-based small-area electrode resistive random access memory and a preparation method thereof; the structure of the resistive random access memory sequentiallycomprises a plurality of upper electrodes, an insulating dielectric film, a resistance change layer thin film, a lower electrode layer and a substrate layer from top to bottom, wherein the lower electrode layer and a resistance change layer are in ohmic contact; and the thermal breakdown voltage ET1 of the insulating dielectric film is smaller than ET2 of the resistance change layer film. The contact area of the upper electrodes and the resistance change material is reduced by forming the effective area of the conductive access, so that the reduction of the operation current/voltage is realized. According to the structure, there is no requirement on whether the selection of the electrode material can be in direct ohmic contact with the resistance change layer or not, so that the control of the generation position of the electrode access can be realized.

The invention provides a phase change temperature control type high-voltage cable. The cable comprises a cable core wire, and an inner sheath, a braided layer and an outer sheath which sequentially coat the outside of the cable core wire, a filling layer is arranged between the cable core wire and the inner sheath, and the filling layer is an expanded graphite-high density polyethylene-paraffin composite phase change microcapsule. An expanded graphite-high density polyethylene-paraffin composite phase-change material, which is an organic composite phase-change material, is used as a filling material of the high-voltage cable, so that the transient temperature rise of the high-voltage cable is effectively reduced, the high-voltage cable is prevented from being locally overheated to cause thermal breakdown, and the service life of the high-voltage cable is prolonged; by use of the braided layer formed by interweaving the superconducting carbon fiber yarns and the outer sheath formed by interweaving the carbon fiber yarns and the copper fiber yarns, the heat dissipation effect is improved; loss of the solid-liquid phase change material is avoided through encapsulation of the filling material; and toxicity and corrosion of the phase change material are isolated through the coating effect.

The invention provides a method for controlling the performance of a notebook computer according to the internal temperature of a battery. In the method, the internal temperature of the battery is detected by SM-BUS on a keyboard controller of the notebook computer; and when the internal temperature of the detected battery and the internal temperature of the battery in use are higher than the preset value, the performances of host computer systems such as CPU, Graphic chip and the like are adjusted so as to prevent the thermal breakdown of the battery, thereby protecting the battery and operational data in the host computer systems. In order to achieve the aim, the method for controlling the performance of the notebook computer according to the internal temperature of the battery comprises the following stages: after the host computer systems such as the CPU, the Graphic chip and the like of the notebook computer are provided with battery sensors, the internal temperature of the battery is detected on the keyboard controller; and according to the internal temperature of the detected battery, the host computer systems are adjusted to operate according to the preset performance.

The present invention provides a multilayer piezoelectric element having excellent durability, wherein a conductive member is not separated from an external electrode even when the element is continuously operated for a long time at high electric field and high pressure. The multilayer piezoelectric element (1) comprises a laminate (7) wherein piezoelectric layers (3) and internal electrode layers (5) are alternately laminated, and an external electrode (9) which is bonded to a lateral surface of the laminate (7) and electrically connected to the internal electrode layers (5). The surface of the external electrode (9) is provided with a plurality of open pores (2). Due to the open pores (2), the bonding strength of the external electrode (9) to a conductive member is improved, thereby preventing separation of the conductive member. In addition, since the heat dissipation characteristics of the external electrode are improved, the external electrode can be prevented from a thermal breakdown due to heat generation.

The invention discloses a preparing method of a heating ceramic tile. The method includes the following steps of S1, cleaning and blow-drying the ceramic tile; S2, ultrasonically mixing graphene/functional graphene with water-based organic silicon resin through an ultrasonic kettle, immediately performing high-shearing dispersion through an emulsifying machine, and performing centrifugal purification through a centrifugal machine after high-shearing dispersion is completed to obtain heating paint; S3, photoetching and introducing a conductive material to the surface of the ceramic tile througha photoetching coating machine to form a conductive path of a special structure so as to obtain a ceramic tile with an introduced wiring layer; S4, spray-coating the ceramic tile with the heating coating through a pressure spraying nozzle, and then thermo-curing a heating layer through a thermo-curing machine to obtain a ceramic tile with a coated heating coating; and S5, spray-coating the ceramic tile with protection layer coating through a pressure spraying nozzle to form a protection layer, and completing illumination through a light curing machine to obtain the heating ceramic tile. The invention meanwhile discloses the heating ceramic tile. The heating ceramic tile has the advantages of being easy to lay, little occupying storey height, stopping combustion and preventing fire, beingfree of thermal runaway and capable of performing heating under the driving of low voltage and the like.

The present invention provides a power semiconductor device which can prevent the thermal breakdown of a power MOSFET when the gate potential of the power MOSFET is not fixed. The power semiconductor device comprises a power MOSFET 11, a series resistor R1 and Zener diode 14 connected between the drain and the source of the power MOSFET 11, a resistor R2 connected between the gate and the source of the power MOSFET 11, and a series resistor R3 and MOS transistor 15 connected between the gate and the source of the power MOSFET 11. The joint of the resistor R1 and the Zener diode 14 is connected to the gate of the MOS transistor 15.

The invention discloses a method for extracting heat production time of a metal structure of a metal insulating layer. By using the ultrafast voltage pulse, a device can generate intrinsic electric breakdown. By changing the pulse time width, the temperature of the device in the breakdown process can be adjusted, and thermal breakdown of the device occurs. The result of the ultrafast pulse is compared with the result of the low-speed pulse, and an inflection point is recorded in the relationship between the breakdown voltage and the pulse width as a heat production time constant of the device.The method is based on the occurrence mechanism of breakdown, so that the method is insensitive to various parasitic effects and has high robustness. According to the method, a relatively accurate heat generation time constant can be obtained, and thermal simulation in circuit design is facilitated, so that the reliability of the circuit is improved.

The invention discloses an OTP (one-time programmable memory) device which comprises a PMOS (p-channel metal oxide semiconductor) transistor and a PNPN thyristor, wherein the PNPN thyristor is positioned on the source region side of the gate structure of the PMOS transistor; a first P+ doped regions and a source region of the PNPN thyristor are shared, and a first N+ doped region is positioned between two P+ doped regions and in lateral contact with the P+ doped regions; the cathode, the anode and the control electrode of the PNPN thyristor are led out of an N well, the first P+ doped region and a second P+ doped region respectively, and a bit line is led out of the first N+ doped region; the state of the OTP device is determined through whether thermal breakdown between the first P+ doped region and the first N+ doped region is formed or not. The invention further discloses a manufacturing method for the OTP device. According to the OTP device and the manufacturing method, the device area can be reduced, so that the integration level of the device is increased and the compatibility between the device and a CMOS (complementary metal oxide semiconductor) process can be improved; programming current is relatively small, so that programming can be carried out by current pulses generated by circuits, without externally applied current pulses.