Silicon nitride waveguide and microannulus-based mode-wavelength multiplexer manufacturing method

A wavelength multiplexing, silicon nitride technology, applied in the direction of light guides, instruments, optical components, etc., to achieve the effect of reducing energy consumption, increasing the number of channels, and simple structure

Inactive Publication Date: 2014-10-22
INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI
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Problems solved by technology

[0003] In order to meet the Peta level (10 15 ) data transmission capacity, it is necessary to accommodate tens of thousands of o

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  • Silicon nitride waveguide and microannulus-based mode-wavelength multiplexer manufacturing method
  • Silicon nitride waveguide and microannulus-based mode-wavelength multiplexer manufacturing method
  • Silicon nitride waveguide and microannulus-based mode-wavelength multiplexer manufacturing method

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Example Embodiment

[0025] See Figure 1-Figure 3 As shown, the present invention provides a method for manufacturing a mode wavelength multiplexing device based on a silicon nitride waveguide and a microring, including:

[0026] Step 1: Sequentially grow a lower limiting silicon dioxide layer 20 and a silicon nitride material mode-wavelength multiplexing integrated device layer 30 on a substrate 10; the material of the substrate 10 is a single crystal, polycrystalline or amorphous silicon wafer , Or electronic or photonic device silicon wafer; the thickness of the lower limit silicon dioxide layer 20 meets the leakage loss of light transmission to the substrate 10 is less than 1dB / cm, and the leakage loss can meet the requirements of low energy consumption for on-chip integration; the nitride The thickness of the silicon material mode-wavelength multiplexing integrated device layer 30 is determined according to the working mode of the transverse electric mode or the transverse magnetic mode, while ...

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Abstract

The invention provides a silicon nitride waveguide and microannulus-based mode-wavelength multiplexer manufacturing method. The method comprises steps: step 1, a lower-limit silicon dioxide layer and a silicon nitride material mode-wavelength multiplexing integrated device layer are sequentially grown on a substrate; step 2, an etching method is adopted to etch the silicon nitride material mode-wavelength multiplexing integrated device layer into a plurality of strip-shaped waveguide structures and a plurality of microannulus resonant cavity structures, and the etching depth reach the surface of the lower-limit silicon dioxide layer; step 3, an upper-limit silicon dioxide layer and a metal heating adjusting layer are sequentially grown on the lower-limit silicon dioxide layer with the plurality of strip-shaped waveguide structures and the plurality of microannulus resonant cavity structures formed in an etching mode; and step 4, an etching method is adopted to etch the metal heating adjusting layer to a plurality of microannulus structures, and manufacturing is completed. According to the method of the invention, coupling is selected through a mode under the wave vector matching condition and characteristics are selected through wavelength of the microannulus, and the on-chip mode-wavelength multiplexing demultiplexing function is realized.

Description

technical field [0001] The patent of the invention relates to the fields of optical interconnection, silicon-based photonics and semiconductor photonics integration, and in particular to a method for preparing a mode-wavelength multiplexing device based on silicon nitride waveguides and microrings. More specifically, the invention utilizes silicon nitride The high-efficiency optical coupling conversion of the waveguide direct coupler and the wavelength selection function of the microring resonator realize the on-chip multiplexing, demultiplexing and filtering functions. Background technique [0002] With the increasing integration of modern microelectronic devices, the challenge of chip performance has shifted from computing functions to data transmission. By 2022, the data transmission rate of interconnection on each chip of the next-generation system architecture is expected to reach 780Tb / s, while the electrical interconnection on a conventional single chip can provide a ...

Claims

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Application Information

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IPC IPC(8): G02B6/136
Inventor 杨跃德黄永箴
Owner INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI
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